88EM8010/88EM8011
Datasheet
5.5
VDD, Signal Ground (SGND) and Power Ground
(PGND)
VDD is the IC power supply pin. It has a typical value of 12V and a maximum operating voltage of
16V. A Zener circuit below 16V is recommended in order to guarantee that the voltage on VDD will
not go any higher than 16V. The IC begins to function when VDD powers on at 12V. Once the IC
powers on, it keeps functioning as long as the VDD is higher than VDD_UVLO, which is 7V (typical). In
a practical design, an electrolytic capacitor is recommended to connect between VDD and ground in
order to retain the IC functionality during startup. That capacitor will need to keep the VDD higher
than 7V before the bias transformer winding takes over and provides enough energy for the power
IC.
A 0.01–0.1μF ceramic capacitor is strongly recommended to be placed between the VDD and IC
ground with the layout trace as close to the IC as possible. This capacitor is used for decoupling the
noise to VDD and clamping the VDD voltage during the switching of the internal driver circuit.
SGND is directly connected to the system ground by a Kelvin connection trace. The system ground
is the source of the MOSFET, as shown in Figure 25. PGND connects to the system ground
separately and can not share the same trace with SGND. This is due to pulse current on PGND
while driving the external MOSFET on and off. This pulse current produces pulse voltage drops on
the PGND trace and may cause the current sensing signal to be distorted if the SGND shares the
same trace.
Figure 25: VDD Decoupling Capacitor and Ground Layout Guidelines
Rgate
Q1
Using Kelvin sensing connection for
SGND with separate trace from PGND
ISNS SGND
PGND
SW
VIN
FB
88EM8010/
8011
Keep this trace right beside
IC and as short as possible
C
VDD
Doc. No. MV-S104861-01 Rev. –
Page 34
Copyright © 2009 Marvell
September 30, 2009, 2.00
Document Classification: Proprietary