®
LY6210248
1024K X 8 BIT LOW POWER CMOS SRAM
Rev. 1.0
AC ELECTRICAL CHARACTERISTICS
(1) READ CYCLE
PARAMETER
SYM.
tRC
UNIT
LY6210248-55
LY6210248-70
MIN. MAX.
70
MIN.
MAX.
Read Cycle Time
Address Access Time
Chip Enable Access Time
Output Enable Access Time
Chip Enable to Output in Low-Z
Output Enable to Output in Low-Z
Chip Disable to Output in High-Z
Output Disable to Output in High-Z
Output Hold from Address Change
55
-
-
-
10
5
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
tAA
55
55
30
-
-
-
-
10
5
-
70
70
35
-
tACE
tOE
tCLZ
tOLZ
tCHZ
tOHZ
tOH
*
*
*
*
-
-
-
-
10
20
20
-
25
25
-
-
10
(2) WRITE CYCLE
PARAMETER
SYM.
tWC
tAW
tCW
tAS
UNIT
LY6210248-55
LY6210248-70
MIN.
55
50
50
0
MAX.
MIN.
70
60
60
0
MAX.
Write Cycle Time
-
-
-
-
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Address Valid to End of Write
Chip Enable to End of Write
Address Set-up Time
Write Pulse Width
Write Recovery Time
Data to Write Time Overlap
Data Hold from End of Write Time
Output Active from End of Write
Write to Output in High-Z
-
-
tWP
tWR
tDW
tDH
tOW
45
0
-
-
55
0
-
-
25
0
-
-
30
0
-
-
*
5
-
5
-
tWHZ
*
-
20
-
25
*These parameters are guaranteed by device characterization, but not production tested.
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
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