®
LY6210248
1024K X 8 BIT LOW POWER CMOS SRAM
Rev. 1.0
DATA RETENTION CHARACTERISTICS
PARAMETER
VCC for Data Retention
SYMBOL TEST CONDITION
VDR CE# ≧ VCC - 0.2V or CE2 ≦0.2V
CC = 1.5V
MIN. TYP. MAX. UNIT
1.5
-
5.5
V
V
-LL
-
5
30
A
µ
Data Retention Current
IDR
CE# ≧VCC - 0.2V or CE2 ≦0.2V
-LLI
-
5
50
A
µ
Other pins at 0.2V or VCC - 0.2V
Chip Disable to Data
Retention Time
See Data Retention
Waveforms (below)
tCDR
tR
0
-
-
-
-
ns
ns
Recovery Time
tRC
*
tRC = Read Cycle Time
*
DATA RETENTION WAVEFORM
Low Vcc Data Retention Waveform (1) (CE# controlled)
VDR ≧ 1.5V
Vcc(min.)
Vcc
Vcc(min.)
tCDR
tR
VIH
CE# ≧ Vcc-0.2V
VIH
CE#
Low Vcc Data Retention Waveform (2) (CE2 controlled)
VDR ≧ 1.5V
Vcc(min.)
Vcc
Vcc(min.)
tCDR
tR
CE2 ≦ 0.2V
CE2
VIL
VIL
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
8
LYONTEK [ Lyontek Inc. ]
