®
LY61L1288
128K X 8 BIT HIGH SPEED CMOS SRAM
Rev. 1.5
DATA RETENTION CHARACTERISTICS
PARAMETER
SYMBOL
TEST CONDITION
MIN.
TYP.
MAX.
UNIT
VCC for Data Retention
VDR CE# ≧ VCC - 0.2V
2.0
-
3.6
V
VCC = 2.0V
Data Retention Current
IDR
CE# ≧ VCC - 0.2V
others at 0.2V or VCC - 0.2V
See Data Retention
Waveforms (below)
-
0.4
2
mA
Chip Disable to Data
Retention Time
Recovery Time
tCDR
tR
0
-
-
-
-
ns
ns
tRC
*
tRC = Read Cycle Time
*
DATA RETENTION WAVEFORM
VDR ≧ 2.0V
Vcc(min.)
Vcc
Vcc(min.)
tCDR
tR
VIH
CE# ≧ Vcc-0.2V
VIH
CE#
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
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