欢迎访问ic37.com |
会员登录 免费注册
发布采购

LY61L1288RL-08E 参数 Datasheet PDF下载

LY61L1288RL-08E图片预览
型号: LY61L1288RL-08E
PDF下载: 下载PDF文件 查看货源
内容描述: [128K X 8 BIT HIGH SPEED CMOS SRAM]
分类和应用: 静态存储器
文件页数/大小: 12 页 / 280 K
品牌: LYONTEK [ Lyontek Inc. ]
 浏览型号LY61L1288RL-08E的Datasheet PDF文件第1页浏览型号LY61L1288RL-08E的Datasheet PDF文件第2页浏览型号LY61L1288RL-08E的Datasheet PDF文件第3页浏览型号LY61L1288RL-08E的Datasheet PDF文件第4页浏览型号LY61L1288RL-08E的Datasheet PDF文件第6页浏览型号LY61L1288RL-08E的Datasheet PDF文件第7页浏览型号LY61L1288RL-08E的Datasheet PDF文件第8页浏览型号LY61L1288RL-08E的Datasheet PDF文件第9页  
®
LY61L1288  
128K X 8 BIT HIGH SPEED CMOS SRAM  
Rev. 1.5  
CAPACITANCE (TA = 25, f = 1.0MHz)  
PARAMETER  
Input Capacitance  
Input/Output Capacitance  
SYMBOL  
MIN.  
-
-
MAX  
6
8
UNIT  
pF  
pF  
CIN  
CI/O  
Note : These parameters are guaranteed by device characterization, but not production tested.  
AC TEST CONDITIONS  
Input Pulse Levels  
0.2V to VCC - 0.2V  
Input Rise and Fall Times  
Input and Output Timing Reference Levels  
Output Load  
3ns  
1.5V  
CL = 30pF + 1TTL, IOH/IOL = -4mA/8mA  
AC ELECTRICAL CHARACTERISTICS  
(1) READ CYCLE  
PARAMETER  
SYM.  
UNIT  
LY61L1288 LY61L1288 LY61L1288 LY61L1288  
-8 -10 -12 -15  
MIN. MAX. MIN. MAX. MIN. MAX. MIN. MAX.  
Read Cycle Time  
Address Access Time  
Chip Enable Access Time  
Output Enable Access Time  
Chip Enable to Output in Low-Z  
Output Enable to Output in Low-Z tOLZ  
Chip Disable to Output in High-Z tCHZ  
Output Disable to Output in High-Z tOHZ  
Output Hold from Address Change tOH  
tRC  
tAA  
tACE  
tOE  
tCLZ  
8
-
-
-
8
8
4
-
10  
-
-
-
10  
10  
5
-
-
5
5
-
12  
-
-
-
12  
12  
6
-
-
6
6
-
15  
-
-
-
15  
15  
7
-
-
7
7
-
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
-
-
-
-
*
*
*
*
2
0
-
-
3
2
0
-
-
3
3
0
-
-
3
4
0
-
-
3
-
4
4
-
(2) WRITE CYCLE  
PARAMETER  
SYM.  
UNIT  
LY61L1288 LY61L1288 LY61L1288 LY61L1288  
-8 -10 -12 -15  
MIN. MAX. MIN. MAX. MIN. MAX. MIN. MAX.  
Write Cycle Time  
tWC  
8
6.5  
6.5  
0
6.5  
0
5
0
1.5  
-
-
-
-
-
-
-
-
-
-
10  
8
8
0
8
0
6
0
2
-
-
-
-
-
-
-
-
-
-
12  
10  
10  
0
9
0
7
0
3
-
-
-
-
-
-
-
-
-
-
15  
12  
12  
0
10  
0
8
0
4
-
-
-
-
-
-
-
-
-
-
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
Address Valid to End of Write  
Chip Enable to End of Write  
Address Set-up Time  
Write Pulse Width  
Write Recovery Time  
Data to Write Time Overlap  
Data Hold from End of Write Time tDH  
Output Active from End of Write  
Write to Output in High-Z  
tAW  
tCW  
tAS  
tWP  
tWR  
tDW  
tOW  
tWHZ  
*
*
5
6
7
8
*These parameters are guaranteed by device characterization, but not production tested.  
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
4
 复制成功!