®
LY612568
Preliminary 0.2
5V 256K X 8 BIT HIGH SPEED CMOS SRAM
AC TEST CONDITIONS
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing Reference Levels
Output Load
0.2V to V
CC
- 0.2V
3ns
1.5V
C
L
= 30pF + 1TTL, I
OH
/I
OL
= -8mA/16mA
AC ELECTRICAL CHARACTERISTICS
(1) READ CYCLE
PARAMETER
Read Cycle Time
Address Access Time
Chip Enable Access Time
Output Enable Access Time
Chip Enable to Output in Low-Z
Output Enable to Output in Low-Z
Chip Disable to Output in High-Z
Output Disable to Output in High-Z
Output Hold from Address Change
(2) WRITE CYCLE
PARAMETER
Write Cycle Time
Address Valid to End of Write
Chip Enable to End of Write
Address Set-up Time
Write Pulse Width
Write Recovery Time
Data to Write Time Overlap
Data Hold from End of Write Time
Output Active from End of Write
Write to Output in High-Z
SYM.
t
RC
t
AA
t
ACE
t
OE
t
CLZ
*
t
OLZ
*
t
CHZ
*
t
OHZ
*
t
OH
LY612568-15
MIN.
MAX.
15
-
-
15
-
15
-
7
4
-
0
-
-
7
-
7
3
-
LY612568-20
MIN.
MAX.
20
-
-
20
-
20
-
8
4
-
0
-
-
8
-
8
3
-
LY612568-25
MIN.
MAX.
25
-
-
25
-
25
-
9
4
-
0
-
-
9
-
9
3
-
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
SYM.
t
WC
t
AW
t
CW
t
AS
t
WP
t
WR
t
DW
t
DH
t
OW
*
t
WHZ
*
LY612568-15
MIN.
MAX.
15
-
12
-
12
-
0
-
10
-
0
-
8
-
0
-
4
-
-
8
LY612568-20
MIN.
MAX.
20
-
16
-
16
-
0
-
11
-
0
-
9
-
0
-
5
-
-
9
LY612568-25
MIN.
MAX.
25
-
20
-
20
-
0
-
12
-
0
-
10
-
0
-
6
-
-
10
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
*These parameters are guaranteed by device characterization, but not production tested.
Lyontek Inc.
reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
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