LTC3642
APPLICATIONS INFORMATION
Efficiency Considerations
Toincreasethedurationofthereferencevoltagesoft-start,
place a capacitor from the SS pin to ground. An internal
5ꢀA pull-up current will charge this capacitor, resulting in
a soft-start ramp time given by:
Theefficiencyofaswitchingregulatorisequaltotheoutput
power divided by the input power times 100%. It is often
useful to analyze individual losses to determine what is
limiting the efficiency and which change would produce
the most improvement. Efficiency can be expressed as:
0.8V
5ꢀA
tSS = CSS
•
Efficiency = 100% – (L1 + L2 + L3 + ...)
When the LTC3642 detects a fault condition (input supply
undervoltage or overvoltage) or when the RUN pin falls
below 1.1V, the SS pin is quickly pulled to ground and the
internal soft-start timer is reset. This ensures an orderly
restart when using an external soft-start capacitor.
where L1, L2, etc. are the individual losses as a percent-
age of input power.
Although all dissipative elements in the circuit produce
losses, two main sources usually account for most of
2
the losses: V operating current and I R losses. The V
IN
IN
The duration of the 1ms internal peak current soft-start
operating current dominates the efficiency loss at very
may be increased by placing a capacitor from the I pin
SET
2
low load currents whereas the I R loss dominates the
toground.Thepeakcurrentsoft-startwillrampfrom25mA
efficiency loss at medium to high load currents.
to the final peak current value determined by a resistor
from I
SET
to ground. A 1ꢀA current is sourced out of the
1. The V operating current comprises two components:
SET
IN
I
pin. With only a capacitor connected between I
The DC supply current as given in the electrical charac-
teristics and the internal MOSFET gate charge currents.
The gate charge current results from switching the gate
capacitance of the internal power MOSFET switches.
Each time the gate is switched from high to low to
SET
and ground, the peak current ramps linearly from 25mA
to 115mA, and the peak current soft-start time can be
expressed as:
0.8V
1ꢀA
tSS(ISET) = CISET
•
high again, a packet of charge, dQ, moves from V to
IN
ground. The resulting dQ/dt is the current out of V
IN
that is typically larger than the DC bias current.
A linear ramp of peak current appears as a quadratic
waveform on the output voltage. For the case where the
2
2. I R losses are calculated from the resistances of the
internal switches, R , and external inductor R . When
peak current is reduced by placing a resistor from I
SET
SW
L
to ground, the peak current offset ramps as a decaying
switching, the average output current flowing through
the inductor is “chopped” between the high side PMOS
switch and the low side NMOS switch. Thus, the series
resistance looking back into the switch pin is a function
exponential with a time constant of R
• C . For this
ISET
ISET
case, the peak current soft-start time is approximately
3 • R • C
.
ISET
ISET
of the top and bottom switch R
values and the
DS(ON)
Unlike the SS pin, the I
pin does not get pulled to
SET
duty cycle (DC = V /V ) as follows:
OUT IN
ground during an abnormal event; however, if the I
SET
pin is floating (programmed to 115mA peak current),
R
= (R )DC + (R
DS(ON)TOP
)(1 – DC)
DS(ON)BOT
SW
the SS and I pins may be tied together and connected
SET
The R
for both the top and bottom MOSFETs can
DS(ON)
to a capacitor to ground. For this special case, both the
peak current and the reference voltage will soft-start on
power-up and after fault conditions. The ramp time for
be obtained from the Typical Performance Characteris-
2
tics curves. Thus, to obtain the I R losses, simply add
R
to R and multiply the result by the square of the
SW
L
this combination is C
• (0.8V/6ꢀA).
SS(ISET)
average output current:
2
2
I R Loss = I (R + R )
O
SW
L
3642f
14
Linear [ Linear ]
