LTC3633A/LTC3633A-1
PIN FUNCTIONS (QFN/TSSOP)
PGOOD1 (Pin 1/Pin 4): Channel 1 Open-Drain Power
ance once the V pin returns to within 5% (typical) of
FB2
Good Output Pin. PGOOD1 is pulled to ground when the
the internal reference.
voltage on the V pin is not within 8% (typical) of the
FB1
V
(Pin 9/Pin 12): Channel 2 Output Feedback Voltage
FB2
internal 0.6V reference. PGOOD1 becomes high imped-
Pin.Inputtotheerroramplifierthatcomparesthefeedback
voltagetotheinternal0.6Vreferencevoltage. Connectthis
pin to a resistor divider network to program the desired
output voltage.
ance once the V pin returns to within 5% (typical) of
FB1
the internal reference.
PHMODE (Pin 2/Pin 5): Phase Select Input. Tie this pin
to ground to force both channels to switch in phase. Tie
TRACKSS2(Pin10/Pin13):OutputTrackingandSoft-Start
Input Pin for Channel 2. Forcing a voltage below 0.6V on
this pin bypasses the internal reference input to the error
amplifier. TheLTC3633AwillservotheFBpintotheTRACK
voltageunderthiscondition.Above0.6V,thetrackingfunc-
tion stops and the internal reference resumes control of
the error amplifier. An internal 1.4μA pull up current from
this pin to INTV to force both channels to switch 180°
CC
out of phase. Do not float this pin.
RUN1 (Pin 3/Pin 6): Channel 1 Regulator Enable Pin.
Enables channel 1 operation by tying RUN1 above 1.22V.
Tying it below 1V places channel 1 into shutdown. Do not
float this pin.
INTV allows a soft start function to be implemented by
CC
MODE/SYNC (Pin 4/Pin 7): Mode Select and External
Synchronization Input. Tie this pin to ground to force
continuous synchronous operation at all output loads.
connecting a capacitor between this pin and SGND.
ITH2 (Pin 11/Pin 14): Channel 2 Error Amplifier Output
and Switching Regulator Compensation Pin. Connect this
pin to appropriate external components to compensate
the regulator loop frequency response. Connect this pin
Floating this pin or tying it to INTV enables high effi-
CC
ciency Burst Mode operation at light loads. Drive this pin
with a clock to synchronize the LTC3633A switching. An
internal phase-locked loop will force the bottom power
NMOS’s turn on signal to be synchronized with the rising
edge of the CLKIN signal. When this pin is driven with a
clock, forced continuous mode is automatically selected.
to INTV to use the default internal compensation.
CC
V
(Pin 12/Pin 15): On-Time Voltage Input for Chan-
ON2
nel 2. This pin sets the voltage trip point for the on-time
comparator. Tying this pin to the output voltage makes the
RT (Pin 5/Pin 8): Oscillator Frequency Program Pin.
Connect an external resistor (between 80k to 640k) from
this pin to SGND in order to program the frequency from
500kHz to 4MHz. When RT is tied to INTV , the switching
frequency will default to 2MHz.
on-time proportional to V
when V
is within the
OUT2
OUT2
V
ON2
sense range (0.6V – 6V for LTC3633A, 1.5V – 12V for
LTC3633A-1).WhenV
isoutsidetheV senserange,
OUT2
ON2
theswitchingfrequencymaydeviatefromtheprogrammed
CC
frequency. The pin impedance is nominally 140kΩ.
RUN2 (Pin 6/Pin 9): Channel 2 Regulator Enable Pin.
Enables channel 2 operation by tying RUN2 above 1.22V.
Tying it below 1V places channel 2 into shutdown. Do not
float this pin.
SW2 (Pins 13, 14/Pins 16, 17): Channel 2 Switch Node
Connection to External Inductor. Voltage swing of SW is
from a diode voltage drop below ground to V .
IN
V
(Pins 15, 16/Pins 18, 19): Power Supply Input for
IN2
SGND (Pin 7/Pin 10): Signal Ground Pin. This pin should
have a low noise connection to reference ground. The
feedbackresistornetwork,externalcompensationnetwork,
and RT resistor should be connected to this ground.
Channel 2. Input voltage to the on chip power MOSFETs
on channel 2. This input is capable of operating from a
different supply voltage than V
.
IN1
BOOST2 (Pin 17/Pin 20): Boosted Floating Driver Supply
for Channel 2. The (+) terminal of the bootstrap capacitor
connects to this pin while the (–) terminal connects to
the SW pin. The normal operation voltage swing of this
PGOOD2 (Pin 8/Pin 11): Channel 2 Open-Drain Power
Good Output Pin. PGOOD2 is pulled to ground when the
voltage on the V pin is not within 8% (typical) of the
FB2
internal 0.6V reference. PGOOD2 becomes high imped-
pin ranges from a diode voltage drop below INTV up
CC
to V +INTV .
IN
CC
3633a1f
8
Linear [ Linear ]
