LTC1771
W U U
APPLICATIO S I FOR ATIO
U
diode conducts most of the time. As VIN approaches VOUT
the diode conducts only a small fraction of the time. The
most stressful condition for the diode is when the output
is short-circuited. Under this condition, the diode must
safely handle IPEAK at close to 100% duty cycle.
Power MOSFET Selection
An external P-channel power MOSFET must be selected
for use with the LTC1771. The main selection criteria for
the power MOSFET are the threshold voltage VGS(TH) and
the “on” resistance RDS(ON), reverse transfer capacitance
and total gate charge.
To maximize both low and high current efficiencies, a fast
switching diode with low forward drop and low reverse
leakage should be used. Low reverse leakage current is
critical to maximize low current efficiency since the leak-
age can potentially exceed the magnitude of the LTC1771
supply current. Low forward drop is critical for high
current efficiency since loss is proportional to forward
drop. The effect of reverse leakage and forward drop on
no-loadsupplycurrentandefficiencyforvariousSchottky
diodes is shown in Table 1. As can be seen, these are
conflicting parameters and the user must weigh the
importance of each spec in choosing the best diode for the
application.
Since the LTC1771 can operate down to input voltages as
low as 2.8V, a sublogic level threshold MOSFET (RDS(ON)
guaranteed at VGS = 2.5V) is required for applications that
workclosetothisvoltage.WhentheseMOSFETsareused,
makesurethattheinputsupplytotheLTC1771islessthan
the absolute maximum VGS rating (typically 12V), as the
MOSFET gate will see the full supply voltage.
The required RDS(ON) of the MOSFET is governed by its
allowable power dissipation. For applications that may
operate the LTC1771 in dropout, i.e. 100% duty cycle, at
its worst case the required RDS(ON) is given by:
Table 1. Effect of Catch Diode on Performance
PP
RDS(ON)
=
LEAKAGE
NO-LOAD
EFFICIENCY
2
DIODE
(V = 3.3V) V @ 1A SUPPLY CURRENT AT 10V/1A
R
F
I
(
1+ δ
(
P
)
)
OUT(MAX)
MBR0540
UPS5817
0.25µA
0.50V
10.4µA
11.8µA
12.2µA
12.2µA
14.0µA
20.0µA
86.3%
88.2%
88.4%
87.9%
89.4%
89.8%
where PP is the allowable power dissipation and δP is the
temperature dependency of RDS(ON). (1 + δP) is generally
given for a MOSFET in the form of a normalized RDS(ON) vs
temperature curve, but = 0.005/°C can be used as an
approximation for low voltage MOSFETs.
2.8µA
3.7µA
4.4µA
8.3µA
19.7µA
0.41V
0.36V
0.43V
0.32V
0.29V
MBR0520
MBRS120T3
MBRM120LT3
MBRS320
In applications where the maximum duty cycle is less than
100%andtheLTC1771isincontinuousmode,theRDS(ON)
is governed by:
CIN and COUT Selection
At higher load currents, when the inductor current is
continuous, the source current of the P-channel MOSFET
is a square wave of duty cycle VOUT/VIN. To prevent large
voltage transients, a low ESR input capacitor sized for the
maximum RMS current must be used. The maximum
capacitor current is given by:
PP
RDS(ON)
=
2
DC IOUT 1+ δP
(
)
(
)
V
OUT + VD
DC =
V + VD
IN
1/2
]
where DC is the maximum operating duty cycle of the
LTC1771.
IMAX
V
V − V
(
)
[
OUT IN OUT
CIN required IRMS
=
VIN
Catch Diode Selection
This formula has a maximum at VIN = 2VOUT, where
IRMS = IOUT/2. This simple worst-case condition is com-
monlyusedfordesignbecauseevensignificantdeviations
donotoffermuchrelief.Notethatcapacitormanufacturer’s
The catch diode carries load current during the off-time.
The average diode current is therefore dependent on the
P-channel switch duty cycle. At high input voltages the
7
Linear [ Linear ]
