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LT1016CS8#PBF 参数 Datasheet PDF下载

LT1016CS8#PBF图片预览
型号: LT1016CS8#PBF
PDF下载: 下载PDF文件 查看货源
内容描述: [LT1016 - Ultra Fast Precision 10ns Comparator; Package: SO; Pins: 8; Temperature Range: 0°C to 70°C]
分类和应用: 放大器PC光电二极管
文件页数/大小: 22 页 / 1049 K
品牌: LINER [ LINEAR TECHNOLOGY ]
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LT1016
APPLICATIONS INFORMATION
Another output-caused fault is shown in Figure 13. The
output transitions are initially correct but end in a ringing
condition. The key to the solution here is the ringing. What
is happening is caused by an output lead that is too long.
The output lead looks like an unterminated transmission
line at high frequencies and reflections occur. This ac-
counts for the abrupt reversal of direction on the leading
edge and the ringing. If the comparator is driving TTL this
may be acceptable, but other loads may not tolerate it. In
this instance, the direction reversal on the leading edge
might cause trouble in a fast TTL load.
Keep output lead
lengths short. If they get much longer than a few inches,
terminate with a resistor (typically 250Ω to 400Ω).
200ns-0.01% Sample-and-Hold Circuit
improve upon a standard circuit function. The 200ns
acquisition time is well beyond monolithic sample-and-
hold capabilities. Other specifications exceed the best
commercial unit’s performance. This circuit also gets
around many of the problems associated with standard
sample-and-hold approaches, including FET switch errors
and amplifier settling time. To achieve this, the LT1016’s
high speed is used in a circuit which completely abandons
traditional sample-and-hold methods.
Important specifications for this circuit include:
Acquisition Time
Common Mode Input Range
Droop
Hold Step
1V/DIV
<200ns
±3V
1µV/µs
2mV
15ns
>>100dB
Hold Settling Time
Feedthrough Rejection
50ns/DIV
1016 F13
Figure 13. Lengthy, Unterminated Output Lines
Ring from Reflections
When the sample-and-hold line goes low, a linear ramp
starts just below the input level and ramps upward. When
the ramp voltage reaches the input voltage, A1 shuts off the
ramp, latches itself off and sends out a signal indicating
sampling is complete.
5V
5.1k
1N4148
390
470
100
1N4148
Q2
2N2907A
0.1µF
5.1k
1.5k
Q3
2N2369
Q5
2N2222
LT1009
2.5V
1.5k
820
1.5k
Q4
2N2907A
1000pF
(POLYSTYRENE)
390
Q6
2N2222
1N4148
SN7402
100
300
Q1
2N5160
8pF
100
1k
1k
DELAY
COMP
Q7
2N5486
+
A1
LT1016
LATCH
SN7402
SN7402
NOW
INPUT
3V
220
–15V
– 5V
OUTPUT
SAMPLE-HOLD
COMMAND (TTL)
1016 F14
Figure 14. 200ns Sample-and-Hold
Rev D
12
For more information