LT1016
APPLICATIONS INFORMATION
“Fuzz” on the edges is the difficulty in Figure 10. This
condition appears similar to Figure 10, but the oscillation
is more stubborn and persists well after the output has
gone low. This condition is due to stray capacitive feed-
back from the outputs to the inputs. A 3kΩ input source
impedance and 3pF of stray feedback allowed this oscil-
lation. The solution for this condition is not too difficult.
Keep source impedances as low as possible, preferably
1k or less. Route output and input pins and components
away from each other.
The opposite of stray-caused oscillations appears in
the input (Trace A). This is due to some combination of
high source impedance and stray capacitance to ground
at the input. The resulting RC forces a lagged response
at the input and output delay occurs. An RC combination
of 2k source resistance and 10pF to ground gives a 20ns
time constant—significantly longer than the LT1016’s
response time.
Keep source impedances low and minimize
stray input capacitance to ground.
Here the output does not oscillate, but the transitions
are discontinuous and relatively slow. The villain of this
situation is a large output load capacitance. This could
be caused by cable driving, excessive output lead
length or the input characteristics of the circuit being
driven. In most situations this is undesirable and may be
eliminated by buffering heavy capacitive loads. In a few
circumstances it may not affect overall circuit operation
and is tolerable.
Consider the comparator’s output load
characteristics and their potential effect on the circuit. If
necessary, buffer the load.
2V/DIV
50ns/DIV
1016 F10
Figure 10. 3pF Stray Capacitive Feedback
with 3kΩ Source Can Cause Oscillation
TRACE A
2V/DIV
2V/DIV
TRACE B
2V/DIV
10ns/DIV
1016 F11
100ns/DIV
1016 F12
Figure 11. Stray 5pF Capacitance from
Input to Ground Causes Delay
Figure 12. Excessive Load Capacitance Forces Edge Distortion
Rev D
For more information
11
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