LT1965
APPLICATIONS INFORMATION
capacitor values below appropriate levels. Capacitor DC
bias characteristics tend to improve as component case
size increases, but expected capacitance at operating
voltages should be verified.
Voltage and temperature coefficients are not the only
sources of problems. Some ceramic capacitors have a
piezoelectric response. A piezoelectric device generates
voltage across its terminals due to mechanical stress,
similar to the way a piezoelectric accelerometer or micro-
phone works. For a ceramic capacitor, the stress can be
induced by vibrations in the system or thermal transients.
The resulting voltages produced can cause appreciable
amounts of noise. A ceramic capacitor produced the trace
in Figure 4 in response to light tapping from a pencil.
Similar vibration induced behavior can masquerade as
increased output voltage noise.
20
0
CHANGE IN VALUE (%)
CHANGE IN VALUE (%)
X5R
–20
–40
–60
Y5V
–80
–100
Overload Recovery
Like many IC power regulators, the LT1965 has safe oper-
ating area protection. The safe area protection decreases
current limit as input-to-output voltage increases and keeps
the power transistor inside a safe operating region for all
values of input-to-output voltage. The protective design
provides some output current at all values of input-to-
output voltage up to the device breakdown.
When power is first applied, as input voltage rises, the
output follows the input, allowing the regulator to start up
into very heavy loads. During start-up, as the input voltage
is rising, the input-to-output voltage differential is small,
allowing the regulator to supply large output currents. With
a high input voltage, a problem can occur wherein removal
of an output short will not allow the output to recover.
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10μF
40
20
0
–20
–40
–60
–80
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10μF
50
25
75
0
TEMPERATURE (°C)
100
125
1965 F03
X5R
Y5V
0
2
4
8
6
10 12
DC BIAS VOLTAGE (V)
14
16
1965 F02
–100
–50 –25
Figure 2. Ceramic Capacitor DC Bias Characteristics
Figure 3. Ceramic Capacitor Temperature Characteristics
1mV/DIV
V
OUT
= 1.3V
C
OUT
= 10μF
I
LOAD
= 0
1ms/DIV
1965 F04
Figure 4. Noise Resulting from Tapping on a Ceramic Capacitor
1965f
9
LINER [ LINEAR TECHNOLOGY ]
