LT1965
TYPICAL PERFORMANCE CHARACTERISTICS
Transient Response
SHDN Transient Response
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
100
50
V
= 3.3V
OUT
SHDN
0
–50
–100
1.5
V
C
C
= 4.3V
IN
IN
OUT
= 10μF CERAMIC
OUTPUT
1.0
0.5
0.0
= 10μF CERAMIC
0
10 20 30 40 50 60 70 80 90 100
0
10 20 30 40 50 60 70 80
TIME (μs)
TIME (μs)
1965 G26
V
C
= 3.3V
OUT
= 2.5k, I = 1mA FOR V
1965 G25
IN
= 10μF CERAMIC
R
= 2.5V
OUT
L
L
PIN FUNCTIONS (DFN/MSOP/DD-PAK/TO-220)
OUT (Pins 1, 2 / 1, 2 / 4 / 4): Output. This pin supplies
power to the load. Use a minimum output capacitor of
10μF to prevent oscillations. Large load transient applica-
tions require larger output capacitors to limit peak volt-
age transients. See the Applications Information section
for more information on output capacitance and reverse
output characteristics.
be driven below GND unless it is tied to the IN pin. If the
SHDN pin is driven below GND while IN is powered, the
output will turn on. SHDN pin logic cannot be referenced
to a negative supply rail.
IN (Pins 7, 8 / 7, 8 / 2 / 2): Input. This pin supplies power
tothedevice.TheLT1965requiresabypasscapacitoratIN
if located more than six inches from the main input filter
capacitor. Include a bypass capacitor in battery-powered
circuits as a battery’s output impedance generally rises
with frequency. A bypass capacitor in the range of 1μF to
10μF suffices. The LT1965’s design withstands reverse
voltages on the IN pin with respect to ground and the
OUT pin. In the case of a reversed input, which occurs if
a battery is plugged in backwards, the LT1965 behaves
as if a diode is in series with its input. No reverse current
flows into the LT1965 and no reverse voltage appears at
the load. The device protects itself and the load.
ADJ (Pins 3 / 3 / 5 / 5): Adjust. This pin is the input to the
error amplifier. It has a typical bias current of 1.3μA that
flows into the pin. The ADJ pin voltage is 1.20V referenced
to ground.
GND (Pins 4, 5 / 4, 5 / 3 / 3): Ground. For the adjustable
LT1965, connect the bottom of the resistor divider, setting
output voltage, directly to GND for optimum regulation.
SHDN (Pin 6 / 6 / 1 / 1): Shutdown. Pulling the SHDN pin
low puts the LT1965 into a low power state and turns the
output off. Drive the SHDN pin with either logic or an open
collector/drain with a pull-up resistor. The resistor sup-
plies the pull-up current to the open collector/drain logic,
normallyseveralmicroamperesandtheSHDNpincurrent,
typically less than 6μA. If unused, connect the SHDN pin
Exposed Pad (Pin 9 / 9, DFN and MSOP Packages Only):
Ground. Tie this pin directly to Pins 4 and 5 and the PCB
ground. This pin provides enhanced thermal performance
with its connection to the PCB ground. See the Applica-
tions Information section for thermal considerations and
to V . The LT1965 will be in its low power shutdown state
IN
if the SHDN pin is not connected. The SHDN pin cannot
calculating junction temperature.
1965f
7
Linear [ Linear ]
