LT3681
APPLICATIONS INFORMATION
PCB Layout
unbrokengroundplanebelowthesecomponents. TheSW
and BOOST nodes should be as small as possible. Finally,
ForproperoperationandminimumEMI,caremustbetaken
during printed circuit board layout. Figure 9 shows the
recommended component placement with trace, ground
plane and via locations. Note that large, switched currents
keep the FB and V nodes small so that the ground traces
C
will shield them from the SW and BOOST nodes. Each of
the Exposed Pads on the bottom of the package must be
soldered to copper pours so that the pad acts as a heat
sink. To keep thermal resistance low, extend the ground
plane as much as possible, and add thermal vias under
and near the LT3681 to additional ground planes within
the circuit board and on the bottom side. Keep in mind
that the thermal design must keep the junctions of the IC
and power diode below the specified absolute maximum
temperature of 125°C.
flow in the LT3681’s V and SW pins, the integrated
IN
Schottky diode the input capacitor (C ) and the output
IN
capacitor (C ). The loop formed by these components
OUT
should be as small as possible. These components,
along with the inductor and output capacitor, should be
placed on the same side of the circuit board, and their
connections should be made on that layer. Place a local,
1
2
3
4
14
V
IN
13
12
11
C
IN
5
6
10
9
7
8
C
OUT
3681 F11
VIAS TO GND
VIAS TO V
VIAS TO V
IN
VIAS TO DC HEATSINK
OUT
Figure 9. A Good PCB Layout Ensures Proper, Low EMI Operation
3681f
17
Linear [ Linear ]
