LT1765/LT1765-1.8/LT1765-2.5/
LT1765-3.3/LT1765-5
APPLICATIONS INFORMATION
Example: with V = 10V, V
= 5V and I = 2A:
DIE TEMPERATURE MEASUREMENT
IN
OUT
OUT
If a true die temperature is required, a measurement of the
SYNC to GND pin resistance can be used. The SYNC pin
resistanceacrosstemperaturemustfirstbecalibrated,with
no significant output load, in an oven. An initial value of
40k with a temperature coefficient of 0.16%/°C is typical.
The same measurement can then be used in operation to
indicate the die temperature.
0.13 2 2 5
(
)( ) ( )
P
=
+ 17 •10−9 2 10 1.25 •106
( )( )
SW
(
)
(
)
10
=0.26 + 0.43 = 0.69W
5 2 2 /50
( ) (
)
= 0.1W
PBOOST
=
10
P =10 0.001 = 0.01W
(
)
Q
FREQUENCY COMPENSATION
Total power dissipation, P , is 0.69 + 0.1 + 0.01 = 0.8W.
TOT
Before starting on the theoretical analysis of frequency
response,thefollowingshouldberemembered—theworse
the board layout, the more difficult the circuit will be to
stabilize. This is true of almost all high frequency analog
circuits,readthe‘LAYOUTCONSIDERATIONS’sectionfirst.
Common layout errors that appear as stability problems
aredistantplacementofinputdecouplingcapacitorand/or
ThermalresistancefortheLT176516-leadTSSOPexposed
pad package is influenced by the presence of internal or
backside planes. With a full plane under the package,
thermal resistance will be about 45°C/W. With no plane
under the package, thermal resistance will increase to
about 110°C/W. For the exposed pad package θ
=
JC(PAD)
catch diode, and connecting the V compensation to a
C
10°C/W. Thermalresistanceisdominatedbyboardperfor-
mance. To calculate die temperature, use the appropriate
thermalresistancenumberandaddinworst-caseambient
temperature:
groundtrackcarryingsignificantswitchcurrent.Inaddition,
the theoretical analysis considers only first order ideal
component behavior. For these reasons, it is important
that a final stability check is made with production layout
and components.
T = T + θ
JA (PTOT)
J
A
When estimating ambient, remember the nearby catch
diode will also be dissipating power.
TheLT1765usescurrentmodecontrol.Thisalleviatesmany
of the phase shift problems associated with the inductor.
The basic regulator loop is shown in Figure 7, with both
tantalum and ceramic capacitor equivalent circuits. The
V
( )
F
V − V
I
(
OUT)( LOAD
)
IN
PDIODE
=
VIN
LT1765 can be considered as two g blocks, the error
m
amplifier and the power stage.
V = Forward voltage of diode (assume 0.5V at 2A)
F
0.5 10−5 2
(
)(
)( )
LT1765
PDIODE
=
= 0.5W
CURRENT MODE
10
V
SW
OUTPUT
POWER STAGE
ERROR
g
m
= 5mho
AMPLIFIER
Notice that the catch diode’s forward voltage contributes
a significant loss in the overall system efficiency. A larger,
lower V diode can improve efficiency by several percent.
R1
R2
FB
–
TANTALUM CERAMIC
g
=
m
F
850μmho
ESR
C1
ESL
C1
+
500k
1.2V
+
Typical thermal resistance of the board θ is 35°C/W. At
B
GND
V
C
an ambient temperature of 25°C,
R
T = T + θ (P ) + θ (P )
DIODE
C
J
A
JA TOT
B
C
F
C
C
T = 25 + 45 (0.8) + 35 (0.5) = 79°C
J
1765 F07
Figure 7. Model for Loop Response
1765fd
13
Linear [ Linear ]
