欢迎访问ic37.com |
会员登录 免费注册
发布采购

1400I 参数 Datasheet PDF下载

1400I图片预览
型号: 1400I
PDF下载: 下载PDF文件 查看货源
内容描述: 完整的SO - 8 , 12位, 400ksps与关断ADC [Complete SO-8, 12-Bit, 400ksps ADC with Shutdown]
分类和应用:
文件页数/大小: 20 页 / 487 K
品牌: Linear [ Linear ]
 浏览型号1400I的Datasheet PDF文件第7页浏览型号1400I的Datasheet PDF文件第8页浏览型号1400I的Datasheet PDF文件第9页浏览型号1400I的Datasheet PDF文件第10页浏览型号1400I的Datasheet PDF文件第12页浏览型号1400I的Datasheet PDF文件第13页浏览型号1400I的Datasheet PDF文件第14页浏览型号1400I的Datasheet PDF文件第15页  
LTC1400  
U U  
W U  
APPLICATIO S I FOR ATIO  
R1  
error adjustment. Figure 10b shows offset and full-scale  
adjustment. Offset error must be adjusted before full-  
scale error. Zero offset is achieved by applying 0.5mV  
(i.e., 0.5LSB) at the input and adjusting the offset trim  
until the LTC1400 output code flickers between 0000  
0000 0000 and 0000 0000 0001. For zero full-scale er-  
ror, apply an analog input of 4.0945V (FS – 1.5LSB or  
last code transition) at the input and adjust R5 until the  
LTC1400 output code flickers between 1111 1111 1110  
and 1111 1111 1111.  
50Ω  
V
+
IN  
A1  
A
IN  
R4  
R2  
10k  
100Ω  
LTC1400  
GND  
R3  
10k  
FULL-SCALE  
ADJUST  
ADDITIONAL PINS OMITTED FOR CLARITY  
±20LSB TRIM RANGE  
1400 F10a  
Bipolar Offset and Full-Scale Error Adjustments  
Figure 10a. LTC1400 Full-Scale Adjust Circuit  
Bipolaroffsetandfull-scaleerrorsareadjustedinasimilar  
fashion to the unipolar case. Bipolar offset error adjust-  
ment is achieved by applying an input voltage of –0.5mV  
(–0.5LSB) to the input in Figure 10c and adjusting the  
op amp until the ADC output code flickers between 0000  
00000000and111111111111.Forfull-scaleadjustment,  
an input voltage of 2.0465V (FS – 1.5LSBs) is applied to  
the input and R5 is adjusted until the output code flickers  
between 0111 1111 1110 and 0111 1111 1111.  
R1  
10k  
ANALOG  
INPUT  
+
0V TO 4.096V  
A
A1  
IN  
R2  
10k  
10k  
R4  
5V  
100k  
LTC1400  
R9  
20Ω  
R5  
4.3k  
FULL-SCALE  
ADJUST  
R3  
100k  
5V  
R7  
R8  
10k  
100k  
Board Layout and Bypassing  
OFFSET  
ADJUST  
R6  
400Ω  
To obtain the best performance from the LTC1400, a  
printed circuit board is required. Layout for the printed  
circuit board should ensure that digital and analog signal  
linesareseparatedasmuchaspossible.Inparticular,care  
should be taken not to run any digital track alongside an  
analog signal track or underneath the ADC. The analog  
input should be screened by GND.  
1400 F10b  
Figure 10b. LTC1400 Offset and Full-Scale Adjust Circuit  
R1  
10k  
ANALOG  
INPUT  
±2.048V  
+
A1  
R2  
10k  
A
IN  
High quality tantalum and ceramic bypass capacitors  
R4  
100k  
should be used at the V and V pins as shown in the  
CC  
REF  
LTC1400  
R5  
4.3k  
Typical Application on the first page of this data sheet.  
For the bipolar mode, a 0.1μF ceramic provides adequate  
FULL-SCALE  
ADJUST  
bypassing for the V pin. For optimum performance, a  
SS  
R3  
10μF surface mount AVX capacitor with a 0.1μF ceramic  
100k  
5V  
R8  
R7  
isrecommendedfortheV andV pins.Thecapacitors  
100k  
CC  
REF  
20k  
OFFSET  
mustbelocatedasclosetothepinsaspossible.Thetraces  
connecting the pins and the bypass capacitors must be  
kept short and should be made as wide as possible. In  
ADJUST  
R6  
–5V  
200Ω  
1400 F10c  
unipolar mode operation, V should be isolated from  
SS  
any noise source before shorting to the GND pin.  
Figure 10c. LTC1400 Bipolar Offset and Full-Scale Adjust Circuit  
1400fa  
11