LTM4641
PIN FUNCTIONS
an on-time adjustment with a resistor to f is required.
AnundervoltagelockoutdetectormonitorsDRV .HYSTis
SET
CC
Otherwise, f can be left open circuit. See the Applica-
pulledlowandswitchingactionisinhibitedifDRV isless
SET
CC
tions Information section for details.
than 4.2V rising (maximum) and 3.5V falling (maximum).
V
(J3): Input Voltage Pin, Low Current for Power
FCB(K2):ForcedContinuous/Pulse-SkippingModeOpera-
tion Programming Pin. Connect this pin to SGND to force
continuous mode operation of the synchronous power
INL
Control and Logic Bias. Feeds LTM4641’s internal 5.3V
LDO (see INTV ). Apply input voltage bias between this
CC
pin and GND. Decouple to GND with a capacitor (0.1µF
MOSFETs (M
and M ) at all output load conditions.
TOP
BOT
to 1µF). This pin powers the heart of LTM4641’s DC/DC
Connect this pin to INTV to enable pulse-skipping mode
CC
controller and internal housekeeping ICs. V bias cur-
operation: the freewheeling power switching MOSFET
INL
rent is within ~5mA of the sum of INTV and CROWBAR
(M ) is turned off of to prevent reverse flow of output
CC
BOT
loading currents.
current (I ) at light loads. See Appendix E for more
OUT
details. This is a high impedance input and must not be
Ifusingtheadvancedoutputovervoltage(OOV)protection
featuresoftheLTM4641,connectV toeitherthedrainof
left electrically open circuit.
INL
the external power-interrupt power MOSFET, identified on
the front page schematic as MSP, or a separate input bias
supply. If not making use of the advanced OOV protection
features, V and V can connect directly to the same
INTV (K4): Internal 5.3V LDO Output. LDO operates off
CC
of V . The INTVCC rail biases low power control and
INL
housekeeping circuitry. INTV is usually connected to
CC
DRV to power the MOSFET drivers interfacing to the
INL
INH
CC
input power source.
switching power MOSFETs. No decoupling capacitance is
needed on this pin unless it is being used to bias external
circuitry (not common); do not apply more than 4.7µF
( 20% tolerance) of external decoupling capacitance. The
LDO losses can be eliminated by connecting V , INTV ,
INL
CC
and DRV if a low power auxiliary ~5V rail is available to
CC
power the resulting node. (See the Applications Informa-
INTV /DRV pin pair can be overdriven by an external
CC
CC
tion section, Figure 47 and Figure 49.)
supply,fromupto6V(absolutemaximum)with50mApeak
sourcing capability, to eliminate power losses otherwise
incurredbytheLTM4641’sV -to-INTV linearregulator
DRV (J4):PowerMOSFETDriverInputPowerPin.DRV
CC
CC
isnormallyconnectedtoINTV .Itmustbekeptwithintwo
CC
INL
CC
diodeꢀdropsꢀ(2ꢀ•ꢀV or ~1.2V at 25°C) of INTV . DRV
(see the Applications Information section and Figure 51).
BE
CC
CC
powers the internal MOSFET driver that interfaces to the
V
(K7-10;L7-12;ꢁ7-8,11-12):InputVoltagePin,High
INH
switching MOSFETs (M
and M ) within LTM4641’s
TOP
BOT
Current to the Power Converter Stage of the LTM4641. All
power stage. It is pinned out separately from INTV to
CC
V
INH
pinsareelectricallyconnectedtoeachotherinternally.
allow gate-driver current to be observed, and to allow an
Devote a large copper plane to connect as many of the
pins to each other as is feasible. This will help form
auxiliary ~5V to 6V bias supply to optionally provide the
V
INH
MOSFET driver bias current. The INTV /DRV pin pair
CC
CC
a low impedance electrical connection between the input
sourceandtheLTM4641’spowerstage. Itwillalsoprovide
a thermal path for removing heat from the BGA package
and minimize junction temperature rise of the LTM4641
for a given application.
can be biased from up to 6V (absolute maximum) from
an external supply with 50mA peak sourcing capability, to
reduce the LTM4641’s INTV LDO losses (see Applica-
CC
tions Information section and Figure 51). When DRV is
CC
connected directly to INTV , no bypass capacitance is
CC
needed except in rare applications where very fast output
voltage ramp up is required (e.g., no soft-start capacitor
on TRACK/SS, or rail-tracking rails with sub-60µs turn-on
rise-time). Otherwise, ~2.2µF to 4.7μF X7R MLCC local
bypassing to GND is recommended. Higher impedance
sourcesmayrequirehigherbypasscapacitance,tomitigate
If utilizing the advanced output overvoltage (OOV) protec-
tion features of the LTM4641, connect V to the source
INH
pin(s)oftheexternalpower-interruptMOSFET,identifiedon
the front page schematic as MSP, with a short wide trace,
or preferably a small copper plane capable of adequately
DRV sag during V
start-up.
CC
OUT
4641f
13
Linear [ Linear ]
