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12066D226MAT2A 参数 Datasheet PDF下载

12066D226MAT2A图片预览
型号: 12066D226MAT2A
PDF下载: 下载PDF文件 查看货源
内容描述: 38V , 10A DC / DC稳压器μModule高级输入和负载保护 [38V, 10A DC/DC μModule Regulator with Advanced Input and Load Protection]
分类和应用: 稳压器
文件页数/大小: 64 页 / 822 K
品牌: Linear [ Linear ]
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LTM4641  
PIN FUNCTIONS  
the remote-sense connections prior to powering up the  
the LTM4641 control loop drives the differential voltage  
+
+
LTM4641. V  
can also be connected as a redundant  
between V  
and V  
to the lesser of TRACK/  
ORB  
OSNS  
OSNS  
is connected to V  
). A resistor may be needed from  
for some output voltage settings. (See  
+
+
+
SS and 0.6V. V  
internal to  
feedbackconnectiontoV  
ontheuser’smotherboard.  
OSNS  
the module (see V  
ORB  
OSNS  
+
ORB  
V
(D2): V  
Readback Pin. This pin connects to  
ORB  
V
OSNS  
+
V
to V  
OSNS  
OSNS  
internaltotheµModuleregulator.Itisrecommended  
OSNS  
the Applications Information section: Setting the Output  
Voltage.) Minimize stray capacitance to this pin to protect  
the integrity of the output voltage feedback signal.  
+
to route this pin (differentially with V  
) to a test point  
ORB  
so as to allow the user a way to confirm the integrity of  
the remote-sense connections prior to powering up the  
V
OSNS  
(H2): Negative Input to the Remote Sense Dif-  
LTM4641. V  
feedbackconnectiontoV  
can also be connected as a redundant  
ORB  
ferential Amplifier. This pin connects to the negative side  
of the output voltage remote sense point (GND potential)  
ontheuser’smotherboard.  
OSNS  
OTBH (D3): Overtemperature Behavior Programming  
Pin. When an overtemperature condition is detected (see  
TEMP), HYST pulls logic low to inhibit switching. If OTBH  
is connected to SGND, the LTM4641 latches HYST low. If  
OTBHisleftfloating,outputvoltageregulationcanresume  
when the overtemperature event clears.  
via a resistor (R  
). When switching action is on,  
SET1B  
the LTM4641 control loop drives the differential voltage  
+
between V  
and V  
to the lesser of TRACK/  
OSNS  
SS and 0.6V. V  
OSNS  
is connected to V  
). A resistor may be needed from  
internal to  
OSNS  
ORB  
the module (see V  
ORB  
+
V
to V  
for some output voltage settings. (See  
OSNS  
OSNS  
the Applications Information section.) Minimize stray ca-  
pacitance to this pin to protect the integrity of the output  
voltage feedback signal.  
TꢁR(D4):TimeoutDelayTimerandPower-OnReset(POR)  
Programming Pin. Connect a capacitor (C  
) from TMR  
TMR  
toSGNDtoprogramthePORandtimeoutdelaytimeofthe  
LTM4641; 9ms delay time per nanofarad of capacitance.  
The minimum delay time is ~90μs, when TMR is left  
electrically open circuit. Even though they use the same  
capacitor, the power-on reset and timeout delay timers  
operate independently of each other. Any nonlatching fault  
or latching fault will reset the respective timer to the full  
delay time without impacting the other timer.  
SW (H10): Switching Node of the Power Stage. Mainly  
used for testing purposes, however, one may optionally  
connect a snubber (series-configured capacitor C and  
SW  
resistorR )fromSWtoGNDtoreduceradiatedEMI—in  
SW  
exchange for a minor compromise to power conversion  
efficiency. (See the Applications Information section.)  
COꢁP(J1):CurrentControlThresholdandErrorAmplifier  
CompensationPoint.Thecurrentcomparatorthresholdof  
LTM4641’s valley current mode control loop—and corre-  
spondingly, the commanded trough of the power inductor  
current—increasesasthiscontrolvoltageincreases.Itcan  
be useful to make COMP available for observation on a  
PCB via or test pad with an oscilloscope probe. However,  
straycapacitanceandtracelengthstothissensitiveanalog  
node should be minimized.  
The timeout delay time programmed by a C  
capacitor  
TMR  
can be negated by pulling TMR to INTV .  
CC  
RUN (D5): Run (On/Off) Control Pin. A RUN pin voltage  
below 0.8V will turn off the module. A voltage above 2V  
will command the module to turn on, if HYST is not as-  
. The LTM4641 contains a moderate  
(10k) pull-up resistor from HYST to INTV , and a pull-up  
Schottky diode from RUN to HYST (see Figure 1). When  
RUN is pulled logic low, HYST is pulled logic low via the  
internal Schottky diode. RUN is compatible with direct-  
drive (totem-pole output drive) as well as open-collector/  
open-drain interfaces.  
serted low by M  
HYST  
CC  
f
(J2): Switching Frequency Setting and Adjustment  
SET  
Pin. ThispininterfacesdirectlytotheI pinofLTM4641’s  
ON  
internal control IC. Current flow into the I pin programs  
ON  
theon-timeofthecontrolloop’sone-shottimerandpower  
control MOSFET, M . Minimize stray capacitance and  
+
TOP  
V
OSNS  
(H1): Positive Input to the Remote Sense Differ-  
ential Amplifier. This pin connects to the positive side of  
any tracelengths to this pin.  
the output voltage remote sense point (V  
potential) via  
). When regulating the output voltage,  
For applications requiring regulated output voltages of 3V  
or less at any time including during voltage rail tracking,  
4641f  
OUT  
a resistor (R  
SET1A  
12