ENDURANCE CHARACTERISTICS
The PALCE22V10 is manufactured using Vantis’ advanced electrically-erasable (EE) CMOS process.
This technology uses an EE cell to replace the fuse link used in bipolar parts. As a result, the device
can be erased and reprogrammed—a feature which allows 100% testing at the factory.
Symbol
Parameter
Min Pattern Data Retention Time
Max Reprogramming Cycles
Test Conditions
Max Storage Temperature
Normal Programming Conditions
Value
10
Unit
Years
Cycles
t
DR
N
100
INPUT/OUTPUT EQUIVALENT SCHEMATICS FOR SELECTED /4 DEVICES*
V
CC
V
100 kΩ
CC
ESD
Protection
Input
V
V
V
CC
CC
CC
100 kΩ
Preload Feedback
Circuitry
Input
*
Device
PALCE22V10H-15
PALCE22V10H-20H
PALCE22V10H-25
PALCE22V10Q-25I
Rev Letter
Output
16564E-018
H
I
28
PALCE22V10 and PALCE22V10Z Families
LATTICE [ LATTICE SEMICONDUCTOR ]
