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LC4256ZC-75TN100C 参数 Datasheet PDF下载

LC4256ZC-75TN100C图片预览
型号: LC4256ZC-75TN100C
PDF下载: 下载PDF文件 查看货源
内容描述: 3.3V / 2.5V / 1.8V在系统可编程超快高密度可编程逻辑器件 [3.3V/2.5V/1.8V In-System Programmable SuperFAST High Density PLDs]
分类和应用: 可编程逻辑器件输入元件时钟
文件页数/大小: 99 页 / 451 K
品牌: LATTICE [ LATTICE SEMICONDUCTOR ]
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Lattice Semiconductor  
ispMACH 4000V/B/C/Z Family Data Sheet  
IEEE 1532-Compliant In-System Programming  
Programming devices in-system provides a number of significant benefits including: rapid prototyping, lower inven-  
tory levels, higher quality and the ability to make in-field modifications. All ispMACH 4000 devices provide In-Sys-  
tem Programming (ISP™) capability through the Boundary Scan Test Access Port. This capability has been  
implemented in a manner that ensures that the port remains complaint to the IEEE 1149.1 standard. By using IEEE  
1149.1 as the communication interface through which ISP is achieved, users get the benefit of a standard, well-  
defined interface. All ispMACH 4000 devices are also compliant with the IEEE 1532 standard.  
The ispMACH 4000 devices can be programmed across the commercial temperature and voltage range. The PC-  
based Lattice software facilitates in-system programming of ispMACH 4000 devices. The software takes the  
JEDEC file output produced by the design implementation software, along with information about the scan chain,  
and creates a set of vectors used to drive the scan chain. The software can use these vectors to drive a scan chain  
via the parallel port of a PC. Alternatively, the software can output files in formats understood by common auto-  
mated test equipment. This equipment can then be used to program ispMACH 4000 devices during the testing of a  
circuit board.  
User Electronic Signature  
The User Electronic Signature (UES) allows the designer to include identification bits or serial numbers inside the  
device, stored in E2CMOS memory. The ispMACH 4000 device contains 32 UES bits that can be configured by the  
user to store unique data such as ID codes, revision numbers or inventory control codes.  
Security Bit  
A programmable security bit is provided on the ispMACH 4000 devices as a deterrent to unauthorized copying of  
the array configuration patterns. Once programmed, this bit defeats readback of the programmed pattern by a  
device programmer, securing proprietary designs from competitors. Programming and verification are also  
defeated by the security bit. The bit can only be reset by erasing the entire device.  
Hot Socketing  
The ispMACH 4000 devices are well-suited for applications that require hot socketing capability. Hot socketing a  
device requires that the device, during power-up and down, can tolerate active signals on the I/Os and inputs with-  
out being damaged. Additionally, it requires that the effects of I/O pin loading be minimal on active signals. The  
ispMACH 4000 devices provide this capability for input voltages in the range 0V to 3.0V.  
Density Migration  
The ispMACH 4000 family has been designed to ensure that different density devices in the same package have  
the same pin-out. Furthermore, the architecture ensures a high success rate when performing design migration  
from lower density parts to higher density parts. In many cases, it is possible to shift a lower utilization design tar-  
geted for a high density device to a lower density device. However, the exact details of the final resource utilization  
will impact the likely success in each case.  
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