Specifications GAL20V8Z
GAL20V8ZD
Complex Mode
All macrocells have seven product terms per output. One product
term is used for programmable output enable control. Pins 1(2) and
13(16) are always available as data inputs into the AND array.
In the Complex mode, macrocells are configured as output only or
I/O functions.
Architecture configurations available in this mode are similar to the
common 20L8 and 20P8 devices with programmable polarity in
each macrocell.
Pin 4(5) is used as dedicated power-down pin on GAL20V8ZD. It
cannot be used as functional input.
The JEDEC fuse numbers including the UES fuses and PTD fuses
are shown on the logic diagram on the following page.
Up to six I/Os are possible in this mode. Dedicated inputs or outputs
can be implemented as subsets of the I/O function. The two outer
most macrocells (pins 15(18) & 22(26)) do not have input capability.
Designs requiring eight I/Os can be implemented in the Registered
mode.
Combinatorial I/O Configuration for Complex Mode
- SYN=1.
- AC0=1.
- XOR=0 defines Active Low Output.
- XOR=1 defines Active High Output.
- AC1 has no effect on this mode.
- Pin 16(19) through Pin 21(25) are configured to this
function.
XOR
Combinatorial Output Configuration for Complex Mode
- SYN=1.
- AC0=1.
- XOR=0 defines Active Low Output.
- XOR=1 defines Active High Output.
- AC1 has no effect on this mode.
- Pin 15(18) and Pin 22(26) are configured to this
function.
XOR
Note: The development software configures all of the architecture control bits and checks for proper pin usage automatically.
6
LATTICE [ LATTICE SEMICONDUCTOR ]
