Specifications GAL16LV8ZD
Electronic Signature
Output Register Preload
An electronic signature word is provided in every GAL16LV8ZD When testing state machine designs, all possible states and state
device. It contains 64 bits of reprogrammable memory that can transitions must be verified in the design, not just those required
contain user defined data. Some uses include user ID codes, in the normal machine operations. This is because, in system
revision numbers, or inventory control. The signature data is al- operation, certain events occur that may throw the logic into an
ways available to the user independent of the state of the security illegal state (power-up, line voltage glitches, brown-outs, etc.). To
cell.
test a design for proper treatment of these conditions, a way must
be provided to break the feedback paths, and force any desired (i.e.,
NOTE: The electronic signature is included in checksum calcula- illegal) state into the registers. Then the machine can be sequenced
tions. Changing the electronic signature will alter checksum.
and the outputs tested for correct next state conditions.
The GAL16LV8ZD devices includes circuitry that allows each reg-
istered output to be synchronously set either high or low. Thus, any
present state condition can be forced for test sequencing. If nec-
essary, approved GAL programmers capable of executing test
vectors perform output register preload automatically.
Security Cell
A security cell is provided in the GAL16LV8ZD devices to prevent
unauthorized copying of the array patterns. Once programmed,
this cell prevents further read access to the functional bits in the
device. This cell can only be erased by re-programming the de-
vice, so the original configuration can never be examined once this
cell is programmed. The electronic signature data is always avail-
able regardless of the security cell state.
Input Buffers
GAL16LV8ZD devices are designed with TTL level compatible input
buffers. These buffers have a characteristically high impedance,
and present a much lighter load to the driving logic than bipolar TTL
devices.
Device Programming
GAL devices are programmed using a Lattice Semiconductor-ap-
proved Logic Programmer, available from a number of manufac-
turers. Complete programming of the device takes only a few sec-
Dedicated Power-Down Pin
onds. Erasing of the device is transparent to the user, and is done The GAL16LV8ZD uses pin 4 as the dedicated power-down sig-
automatically as part of the programming cycle.
nal to put the device in to the power-down state. DPP is an active
high signal where a logic high driven on this signal puts the device
into power-down state. Input pin 4 cannot be used as a logic func-
tion input on this device.
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LATTICE [ LATTICE SEMICONDUCTOR ]
