Pinout Information
LatticeECP2/M Family Data Sheet
Lattice Semiconductor
LFE2-12E/SE and LFE2-20E/SE Logic Signal Connections: 484 fpBGA
LFE2-12E/12SE
LFE2-20E/20SE
Ball
Ball/Pad
Function
Ball/Pad
Function
Number
Bank
6
-
Dual Function
Differential
Bank
6
-
Dual Function
Differential
M3
GNDIO
M4
-
PL16A
GNDIO6
PL16B
-
VREF2_6
T
PL22A
-
VREF2_6/LDQ25
VREF1_6/LDQ25
T
6
-
VREF1_6
C
PL22B
VCCIO6
PL24A
PL23A
PL24B
PL23B
GNDIO
PL25A
PL26A
PL25B
VCCIO6
PL26B
PL27A
PL27B
PL28A
GNDIO
PL28B
LLM0_PLLCAP
PL30A
-
6
6
6
6
6
6
-
C
N1
NC
-
LDQ25
LDQ25
LDQ25
LDQ25
T
M2
N2
NC
-
T (LVDS)*
C
NC
-
M1
-
NC
-
C (LVDS)*
-
-
N3
NC
-
6
6
6
6
6
6
6
6
-
LDQS25
LDQ25
LDQ25
T (LVDS)*
T
N5
NC
-
N4
NC
-
C (LVDS)*
-
-
-
P5
NC
-
LDQ25
C
P1
PL17A
PL17B
PL18A
-
6
6
6
-
LLM0_GDLLT_IN_A** T (LVDS)*
LLM0_GDLLC_IN_A** C (LVDS)*
LLM0_GDLLT_IN_A**/LDQ25 T (LVDS)*
LLM0_GDLLC_IN_A**/LDQ25 C (LVDS)*
P2
P4
LLM0_GDLLT_FB_A
T
LLM0_GDLLT_FB_A/LDQ25
T
-
R4
PL18B
LLM0_PLLCAP
PL20A
GNDIO6
PL21A
PL20B
PL21B
PL23A
VCCIO6
PL22A
PL23B
PL22B
GNDIO6
-
6
6
6
-
LLM0_GDLLC_FB_A
C
6
6
6
-
LLM0_GDLLC_FB_A/LDQ25
C
P6
R1
LLM0_GPLLT_IN_A** T (LVDS)*
LLM0_GPLLT_IN_A**/LDQ34 T (LVDS)*
GNDIO
R3
6
6
6
6
6
6
6
6
-
LLM0_GPLLT_FB_A
T
PL31A
PL30B
PL31B
PL33A
VCCIO6
PL32A
PL33B
PL32B
GNDIO6
VCCIO6
PL39A
GNDIO
PL39B
PL38A
PL41A
VCCIO6
PL38B
PL41B
PL40A
PL43A
GNDIO
PL43B
PL40B
6
6
6
6
6
6
6
6
-
LLM0_GPLLT_FB_A/LDQ34
LLM0_GPLLC_IN_A/LDQ34
LLM0_GPLLC_FB_A/LDQ34
LDQ34
T
R2
LLM0_GPLLC_IN_A** C (LVDS)*
C (LVDS)*
T4
LLM0_GPLLC_FB_A
C
T
C
T
T5
VCCIO
T1
T (LVDS)*
C
LDQ34
LDQ34
LDQ34
T (LVDS)*
C
T3
T2
C (LVDS)*
C (LVDS)*
GNDIO
-
-
6
6
-
V1
PL25A
-
6
-
LDQ28
T
LDQ42
T
-
V2
PL25B
PL24A
PL27A
VCCIO6
PL24B
PL27B
PL26A
PL29A
GNDIO6
PL29B
PL26B
6
6
6
6
6
6
6
6
-
LDQ28
LDQ28
LDQ28
C
T (LVDS)*
T
6
6
6
6
6
6
6
6
-
LDQ42
LDQ42
LDQ42
C
T (LVDS)*
T
U1
U3
VCCIO
U2
LDQ28
LDQ28
LDQ28
LDQ28
C (LVDS)*
LDQ42
LDQ42
LDQ42
LDQ42
C (LVDS)*
U4
C
T (LVDS)*
T
C
T (LVDS)*
T
R6
R7
GNDIO
T7
6
6
LDQ28
LDQ28
C
6
6
LDQ42
LDQ42
C
T6
C (LVDS)*
C (LVDS)*
4-48