Pinout Information
LatticeECP2/M Family Data Sheet
Lattice Semiconductor
LFE2-12E/SE and LFE2-20E/SE Logic Signal Connections: 484 fpBGA
LFE2-12E/12SE
LFE2-20E/20SE
Ball
Ball/Pad
Function
Ball/Pad
Function
Number
Bank
8
8
-
Dual Function
Differential
Bank
8
8
-
Dual Function
Differential
V22
R16
GNDIO
W22
R17
V21
VCCIO
U19
T17
INITN
PR30B
GNDIO8
CCLK
INITN
PR44B
GNDIO8
CCLK
WRITEN
C
WRITEN
C
8
8
8
8
8
8
8
8
-
8
8
8
8
8
8
8
8
-
PR30A
DONE
VCCIO8
PR29B
PR26B
PR29A
PR28A
GNDIO8
PR26A
PR27B
PR25B
PR27A
VCCIO8
PR25A
PR24B
PR24A
-
CS1N
T
PR44A
DONE
CS1N
T
VCCIO8
PR43B
PR40B
PR43A
PR42A
GNDIO8
PR40A
PR41B
PR39B
PR41A
VCCIO8
PR39A
PR38B
PR38A
VCCIO3
GNDIO3
PR32B
PR33B
PR32A
PR33A
VCCIO3
PR31B
PR31A
PR30B
PR30A
RLM0_PLLCAP
PR28B
PR27B
GNDIO3
PR28A
PR27A
PR26B
VCCIO3
PR26A
PR23B
GNDIO
PR24B
PR23A
PR24A
CSN
C
C
T
T
CSN
C
C
T
T
D5
D0/SPIFASTN
D2
D5
D0/SPIFASTN
D2
U20
U21
GNDIO
T18
8
8
8
8
8
8
8
8
-
D6
D3
D7
D4
T
C
C
T
8
8
8
8
8
8
8
8
3
-
D6
D3
D7
D4
T
C
C
T
T20
T21
T19
VCCIO
T22
DI/CSSPI0N
DOUT/CSON
BUSY/SISPI
T
C
T
DI/CSSPI0N
DOUT/CSON
BUSY/SISPI
T
C
T
R18
R19
-
GNDIO
P18
R22
P19
R21
VCCIO
R20
P22
P21
N21
N17
N22
M22
GNDIO
N20
M21
N19
-
GNDIO3
PR22B
PR23B
PR22A
PR23A
VCCIO3
PR21B
PR21A
PR20B
PR20A
RLM0_PLLCAP
PR18B
PR17B
GNDIO3
PR18A
PR17A
NC
-
3
3
3
3
3
3
3
3
3
3
3
3
-
C (LVDS)*
3
3
3
3
3
3
3
3
3
3
3
3
-
RDQ34
RDQ34
RDQ34
RDQ34
C (LVDS)*
C
T (LVDS)*
T
C
T (LVDS)*
T
RLM0_GPLLC_FB_A
RLM0_GPLLT_FB_A
C
T
RLM0_GPLLC_FB_A/RDQ34
RLM0_GPLLT_FB_A/RDQ34
C
T
RLM0_GPLLC_IN_A** C (LVDS)*
RLM0_GPLLT_IN_A** T (LVDS)*
RLM0_GPLLC_IN_A**/RDQ34 C (LVDS)*
RLM0_GPLLT_IN_A**/RDQ34 T (LVDS)*
RLM0_GDLLC_FB_A
C
RLM0_GDLLC_FB_A/RDQ25
C
RLM0_GDLLC_IN_A** C (LVDS)*
RLM0_GDLLC_IN_A**/RDQ25 C (LVDS)*
3
3
-
RLM0_GDLLT_FB_A
T
3
3
3
3
3
3
-
RLM0_GDLLT_FB_A/RDQ25
T
RLM0_GDLLT_IN_A** T (LVDS)*
RLM0_GDLLT_IN_A**/RDQ25 T (LVDS)*
RDQ25
C
-
-
M19
J22
NC
-
RDQ25
RDQ25
T
NC
-
C (LVDS)*
-
-
-
L22
NC
-
3
3
3
RDQ25
RDQ25
RDQ25
C
T (LVDS)*
T
H22
K22
NC
-
NC
-
4-52