Pinout Information
LatticeECP2/M Family Data Sheet
Lattice Semiconductor
LFE2-20E/SE Logic Signal Connections: 256 fpBGA (Cont.)
LFE2-20E/SE
Ball
Number
VCCIO
D12
B14
C14
A14
D13
C13
GND
A13
B13
VCCIO
A12
B11
D11
A11
C11
-
Ball Number
VCCIO
D12
B14
C14
A14
D13
C13
GND
A13
B13
VCCIO
A12
B11
D11
A11
C11
GND
VCC
D10
C10
GND
B10
A9
Ball/Pad Function
VCCIO1
PT62A
PT61B
PT60B
PT61A
PT60A
PT59B
GNDIO1
PT58B
PT59A
VCCIO1
PT58A
PT57B
PT56B
PT57A
PT56A
GNDIO1
VCCIO
PT46B
PT46A
GNDIO1
PT45B
PT44B
PT45A
PT44A
VCCIO1
PT43B
PT42B
PT43A
PT42A
GNDIO1
PT41B
PT40B
PT41A
PT40A
VCCIO1
PT39B
PT39A
XRES
Bank
1
1
1
1
1
1
1
-
Dual Function
Differential
T
C
C
T
T
C
1
1
1
1
1
1
1
1
1
1
1
1
-
C
T
T
C
C
T
T
-
D10
C10
GND
B10
A9
C
T
1
1
1
1
1
1
1
1
1
-
C
C
T
T
A10
B9
A10
B9
VCCIO
A8
VCCIO
A8
C
C
T
T
D9
D9
B8
B8
C9
C9
GND
B7
GND
B7
1
1
1
1
1
1
1
1
0
-
C
C
T
T
E9
E9
A7
A7
D8
D8
VCCIO
A6
VCCIO
A6
PCLKC1_0
PCLKT1_0
C
T
B6
B6
E6
E6
F8
F8
PT37B
GNDIO0
PT37A
PCLKC0_0
PCLKT0_0
C
T
GND
E8
GND
E8
0
4-44