Pinout Information
LatticeECP2/M Family Data Sheet
Lattice Semiconductor
LFE2-6E/SE and LFE2-12E/SE Logic Signal Connections: 144 TQFP
LFE2-6E/SE
LFE2-12E/12SE
Pin
Pin/Pad
Pin/Pad
Dual
Number
Function
Bank
7
7
7
7
7
-
Dual Function
Differential
T (LVDS)*
C (LVDS)*
T (LVDS)*
C (LVDS)*
T (LVDS)*
Function
Bank
Function
VREF2_7
VREF1_7
Differential
T (LVDS)*
C (LVDS)*
T (LVDS)*
C (LVDS)*
T (LVDS)*
1
PL2A
PL2B
VREF2_7
VREF1_7
PL2A
PL2B
7
7
7
7
7
-
2
3
PL4A
PL4A
4
PL4B
PL4B
5
PL6A
LDQ10
PL6A
LDQ10
6
VCCAUX
PL6B
VCCAUX
PL6B
7
7
7
7
7
-
LDQ10
LDQ10
C (LVDS)*
T (LVDS)*
7
7
7
7
-
LDQ10
LDQ10
C (LVDS)*
T (LVDS)*
8
PL8A
PL8A
9
VCCIO7
PL8B
VCCIO7
PL8B
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
LDQ10
C (LVDS)*
LDQ10
C (LVDS)*
GND
GND
PL12A
PL12B
PL13A
PL13B
VCC
7
7
7
7
-
LDQ10
T (LVDS)*
PL12A
PL12B
PL13A
PL13B
VCC
7
7
7
7
-
LDQ10
T (LVDS)*
LDQ10
C (LVDS)*
LDQ10
C (LVDS)*
PCLKT7_0/LDQ10
PCLKC7_0/LDQ10
T
PCLKT7_0/LDQ10
PCLKC7_0/LDQ10
T
C
C
PL15A
PL15B
PL16A
PL16B
GND
6
6
6
6
-
PCLKT6_0
PCLKC6_0
VREF2_6
VREF1_6
T (LVDS)*
PL15A
PL15B
PL16A
PL16B
GND
6
6
6
6
-
PCLKT6_0
PCLKC6_0
VREF2_6
VREF1_6
T (LVDS)*
C (LVDS)*
C (LVDS)*
T
T
C
C
VCC
-
VCC
-
PL18A
PL18B
LLM0_PLLCAP
PL20A
PL20B
PL22A
VCC
6
6
6
6
6
6
-
LLM0_GDLLT_FB_A
LLM0_GDLLC_FB_A
T
PL18A
PL18B
LLM0_PLLCAP
PL20A
PL20B
PL22A
VCC
6
6
6
6
6
6
-
LLM0_GDLLT_FB_A
LLM0_GDLLC_FB_A
T
C
C
LLM0_GPLLT_IN_A**
T (LVDS)*
LLM0_GPLLT_IN_A**
LLM0_GPLLC_IN_A**
T (LVDS)*
C (LVDS)*
LLM0_GPLLC_IN_A** C (LVDS)*
GND
-
GND
-
VCCIO6
TCK
6
-
VCCIO6
TCK
6
-
TDI
-
TDI
-
TDO
-
TDO
-
VCCJ
TMS
-
VCCJ
-
-
TMS
-
PB2A
5
5
-
VREF2_5/BDQ6
VREF1_5/BDQ6
T
PB2A
5
5
-
VREF2_5/BDQ6
VREF1_5/BDQ6
T
PB2B
C
PB2B
C
VCCAUX
PB4A
VCCAUX
PB6A
5
5
5
5
5
5
BDQ6
BDQ6
T
5
5
5
5
5
5
BDQS6
BDQ6
T
PB4B
C
PB6B
C
VCCIO5
PB6A
VCCIO5
PB12A
PB12B
PB16A
BDQS6
BDQ6
T
BDQ15
BDQ15
BDQ15
T
C
T
PB6B
C
NC
4-22