Specifications ispLSI 8840
Internal Timing Parameters
Over Recommended Operating Conditions
-110
-90
-60
PARA-
METER
2
#
DESCRIPTION
MIN
MAX
MIN
MAX
MIN
MAX UNITS
BFM / Global Routing Pool Delay
tbfmi
tgrpi
tgrpiz
tbfmm
tgrpm
61 BFM Routing Delay, Signal from I/O Cell
–
–
–
–
–
–
–
–
–
–
–
–
0.2
0.2
2.2
1.9
2
–
–
–
–
–
–
–
–
–
–
–
–
0.3
0.2
2.5
2.3
2.4
4.7
1.8
3.0
0.6
4.1
0.4
3.9
–
–
–
–
–
–
–
–
–
–
–
–
0.4
0.4
3.8
3.4
3.5
7.1
2.8
4.4
0.8
6.1
0.6
5.9
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
62 GRP Delay, Signal from I/O Cell
63 Internal Tristate Bus Enable/Disable, I/O Cell Buffer
64 BFM Routing Delay, Signal from Macrocell
65 GRP Delay, Signal from Macrocell
tgrpmz 66 Internal Tristate Bus Enable/Disable, Macrocell Buffer
4
tbfmg
tgrpb
tbcom
tbreg
tgcom
tgreg
67 BFM Routing Delay, Signal from GRP
68 GRP Delay, Signal from BFM Routing
69 BFM Routing to I/O Cell, Combinatorial Path
70 BFM Routing to I/O Cell, Registered Path
71 GRP to I/O Cell, Combinatorial Path
72 GRP to I/O Cell, Registered Path
1.6
2.5
0.5
3.5
0.4
3.4
I/O Control Bus Delay
tpiock
73 Product Term as I/O Cell Register Clock
–
–
–
–
–
6.5
6.5
6.7
7.3
6.0
–
–
–
–
–
7.7
7.7
7.9
8.8
7.1
–
–
–
–
–
11.6
11.6
11.9
13.2
10.7
ns
ns
ns
ns
ns
tpiocken 74 Product Term as I/O Cell Register Clock Enable
tpoe
tpiorst
tpioz
75 Product Term as Output Buffer Enable/Disable
76 Product Term as I/O Cell Register Reset or Set Delay
77 Internal Tristate Bus Control Signal for I/O Cell Buffer
Global Control Delay
tgck
78 Global Macrocell Register Clk
2.9
4.7
3.9
4.8
2.4
–
3.7
4.7
3.9
4.8
2.4
6
3.1
5.8
4.1
5.9
2.1
–
4.9
5.8
5.0
5.9
3.5
7.7
8.6
5.1
5.9
4.6
8.7
6.2
8.9
3.2
–
7.3
8.7
ns
ns
ns
ns
ns
ns
ns
ns
ns
tgcken 79 Global Macrocell Register Clk Enable
tgiock
tgiocken 81 Global I/O Register Clk Enable
tqck
tgoe
ttoe
tgmrst
tgiorst
80 Global I/O Register Clk
7.0
8.9
82 Quadrant I/O Register Clk
83 Global Output Enable
5.1
11.5
12.9
7.6
84 Test Output Enable
–
7.3
4
–
–
85 Global GLB Register Reset
86 Global I/O Cell Register Reset
–
–
–
–
4.6
–
–
8.8
1. Internal Timing Parameters are not tested and are for reference only.
2. Refer to Timing Model in this data sheet for further details.
15