Specifications
ispLSI 5512VA
Figure 8. Boundary Scan Waveforms and Timing Specifications
TMS
TDI
T
btsu
T
btch
TCK
T
btcl
T
bth
T
btcp
T
btvo
TDO
Valid Data
T
btco
Valid Data
T
btoz
T
btcpsu
Data to be
captured
T
btcph
Data Captured
T
btuov
Data to be
driven out
T
btuco
Valid Data
T
btuoz
Valid Data
SYMBOL
t
btcp
t
btch
tbtcl
tbtsu
tbth
trf
tbtco
tbtoz
tbtvo
tbtcpsu
tbtcph
tbtuco
tbtuoz
tbtuov
PARAMETER
TCK [BSCAN test] clock pulse width
TCK [BSCAN test] pulse width high
TCK [BSCAN test] pulse width low
TCK [BSCAN test] setup time
TCK [BSCAN test] hold time
TCK [BSCAN test] rise and fall time
TAP controller falling edge of clock to valid output
TAP controller falling edge of clock to data output disable
TAP controller falling edge of clock to data output enable
BSCAN test Capture register setup time
BSCAN test Capture register hold time
BSCAN test Update reg, falling edge of clock to valid output
BSCAN test Update reg, falling edge of clock to output disable
BSCAN test Update reg, falling edge of clock to output enable
MIN
125
62.5
62.5
25
25
50
–
–
–
25
25
–
–
–
MAX UNITS
–
–
–
–
–
–
25
25
25
–
–
50
50
50
ns
ns
ns
ns
ns
mV/ns
ns
ns
ns
ns
ns
ns
ns
ns
9
LATTICE [ LATTICE SEMICONDUCTOR ]
