Specifications ispLSI 2032VE
Pin Configuration
ispLSI 2032VE 48-Pin TQFP Pinout Diagram
48 47 46 45 44 43 42 41 40 39 38 37
36
35
34
33
NC2
I/O 28
I/O 29
I/O 30
1
2
I/O 18
I/O 17
I/O 16
TMS/NC2
RESET/Y11
VCC
3
4
5
6
7
I/O 31
Y0
32
31
30
29
ispLSI 2032VE
VCC
BSCAN
1TDI/IN 0
Top View
TCK/Y21
8
28
27
26
25
I/O 15
I/O 14
I/O 13
I/O 12
I/O 0
9
I/O 1
10
11
12
I/O 2
2NC
13 14 15 16 17 18 19 20 21 22 23 24
48TQFP/2032VE
1. Pins have dual function capability.
2. NC pins are not to be connected to any active signals, V or GND.
CC
Signal Configuration
ispLSI 2032VE 49-Ball caBGA Signal Diagram
7
6
5
4
3
2
1
I/O
21
I/O
23
GOE
0
I/O
25
I/O
27
NC1
NC1
A
B
C
D
E
F
A
B
C
D
E
F
I/O
18
I/O
17
I/O
20
I/O
22
I/O
24
I/O
26
I/O
30
I/O
16
TMS/
NC1
I/O
19
I/O
28
I/O
29
GND
NC1
Y0
RESET/
Y1
I/O
15
I/O
31
VCC
VCC
BSCAN
I/O
13
I/O
12
I/O
3
TDI/
IN0
I/O
0
TCK/
Y2
GND
I/O
14
I/O
10
I/O
8
I/O
6
I/O
4
I/O
1
I/O
2
I/O
11
I/O
9
TDO/
IN1
I/O
7
I/O
5
NC1
NC1
G
G
ispLSI 2032VE
Bottom View
49-BGA/2032VE
7
6
5
4
3
2
1
1. NCs are not to be connected to any active signals, VCC or GND.
Note: Ball A1 indicator dot on top side of package.
13
LATTICE [ LATTICE SEMICONDUCTOR ]
