14 | Keysight | N4960A Serial BERT 17 and 32 Gb/s - Data Sheet
Block diagram 32 Gb/s serial BERT
USB or GPIB
N4960A-CJ0/N4960A-CJ1
Dly clk in
÷ n
Delay
Divided output
Delayed output
2.5 to 16 GHz
10
PJ
5 to 32 Gb/s
N4952A (ED)
High deviation modulator
Ext jitter in
Ext clock in
N4951A/B (PG)
N4951A/B (PG)
5 to 32 Gb/s
5 to 32 Gb/s
Main (jittered) output
10 MHz
Ref in
2.5 to 16 GHz
10
2.5 to 16 GHz
synthesizer
Low deviation modulator
∑
10 MHz
reference
SJ1
10 MHz
ref out
SJ2
RJ
SSC
modulator
RJ filter loop
(N4960A-CJ1 only)
Figure 22. Block diagram (32 Gb/s system).
Block diagram 17 Gb/s serial BERT
USB or GPIB
N4960A-CJ0/N4960A-CJ1
Dly clk in
÷ n
Delay
Divided output
Delayed output
2 to 8.5 GHz
PJ
4 to 17 Gb/s
N4952A (ED)
High deviation modulator
10
Ext jitter in
Ext clock in
N4951A/B (PG)
N4951A/B (PG)
4 to 17 Gb/s
4 to 17 Gb/s
Main (jittered) output
10 MHz
Ref in
2 to 8.5 GHz
10
2 to 8.5 GHz
synthesizer
Low deviation modulator
∑
10 MHz
reference
SJ1
10 MHz
ref out
SJ2
RJ
SSC
modulator
RJ filter loop
(N4960A-CJ1 only)
Figure 23. Block diagram (17 Gb/s system).
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