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IS61LV10248-10TI 参数 Datasheet PDF下载

IS61LV10248-10TI图片预览
型号: IS61LV10248-10TI
PDF下载: 下载PDF文件 查看货源
内容描述: 1M ×8高速CMOS静态RAM [1M x 8 HIGH-SPEED CMOS STATIC RAM]
分类和应用: 存储内存集成电路静态存储器光电二极管
文件页数/大小: 16 页 / 116 K
品牌: ISSI [ INTEGRATED SILICON SOLUTION, INC ]
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®
IS61LV10248  
ISSI  
AC WAVEFORMS  
WRITE CYCLE NO. 2(1,2) (WE Controlled: OE is HIGH During Write Cycle)  
t
WC  
ADDRESS  
VALID ADDRESS  
t
HA  
OE  
LOW  
CE  
t
AW  
t
PWE1  
WE  
t
SA  
t
HZWE  
t
LZWE  
HIGH-Z  
DATA UNDEFINED  
D
OUT  
t
SD  
t
HD  
DATAIN VALID  
DIN  
CE_WR2.eps  
Notes:  
1. The internal write time is defined by the overlap of CE LOW and WE LOW. All signals must be in valid states to initiate a Write, but  
any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling edge of  
the signal that terminates the Write.  
2. I/O will assume the High-Z state if OE > VIH.  
10  
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774  
Rev. C  
04/13/06