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IS42S32400B-6BL 参数 Datasheet PDF下载

IS42S32400B-6BL图片预览
型号: IS42S32400B-6BL
PDF下载: 下载PDF文件 查看货源
内容描述: 4Meg ×32 128兆位同步DRAM [4Meg x 32 128-MBIT SYNCHRONOUS DRAM]
分类和应用: 存储内存集成电路动态存储器时钟
文件页数/大小: 60 页 / 625 K
品牌: ISSI [ INTEGRATED SILICON SOLUTION, INC ]
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®
IS42S32400B  
ISSI  
OPERATING FREQUENCY / LATENCY RELATIONSHIPS  
SYMBOL PARAMETER  
UNITS  
Clock Cycle Time  
6
7
8
10  
ns  
Operating Frequency  
166  
143  
125  
100  
MHz  
tCAC  
tRCD  
tRAC  
CAS Latency  
3
3
3
3
2/3  
3
2/3  
2
cycle  
cycle  
cycle  
Active Command To Read/Write Command Delay Time  
RAS Latency (tRCD + tCAC)  
CAS Latency = 3  
CAS Latency = 2  
6
6
6
5
5
4
tRC  
Command Period (REF to REF / ACT to ACT)  
Command Period (ACT to PRE)  
10  
7
10  
7
8
6
3
2
1
7
5
2
2
1
cycle  
cycle  
cycle  
cycle  
cycle  
tRAS  
tRP  
Command Period (PRE to ACT)  
3
3
tRRD  
tCCD  
Command Period (ACT[0] to ACT [1])  
2
2
Column Command Delay Time  
(READ, READA, WRIT, WRITA)  
1
1
tDPL  
Input Data To Precharge Command Delay Time  
2
5
2
5
2
4
2
4
cycle  
cycle  
tDAL  
Input Data To Active/Refresh Command Delay Time  
(During Auto-Precharge)  
tRBD  
tWBD  
tRQL  
tWDL  
tPQL  
Burst Stop Command To Output in HIGH-Z Delay Time CAS Latency = 3  
3
3
3
2
3
2
cycle  
cycle  
cycle  
cycle  
cycle  
(Read)  
CAS Latency = 2  
Burst Stop Command To Input in Invalid Delay Time  
(Write)  
0
0
0
0
PrechargeCommandToOutputinHIGH-ZDelayTime  
(Read)  
CAS Latency = 3  
CAS Latency = 2  
3
3
3
2
3
2
Precharge Command To Input in Invalid Delay Time  
(Write)  
0
0
0
0
LastOutputToAuto-PrechargeStartTime(Read)  
CAS Latency = 3  
CAS Latency = 2  
-2  
–2  
-2  
-1  
-2  
-1  
tQMD  
tDMD  
tMRD  
DQM To Output Delay Time (Read)  
DQM To Input Delay Time (Write)  
2
0
2
2
0
2
2
0
2
2
0
2
cycle  
cycle  
cycle  
Mode Register Set To Command Delay Time  
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774  
17  
PRELIMINARYINFORMATION Rev. 00G  
06/15/06