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IC42S16800D-7TL 参数 Datasheet PDF下载

IC42S16800D-7TL图片预览
型号: IC42S16800D-7TL
PDF下载: 下载PDF文件 查看货源
内容描述: 16兆×8 , 8Meg X16 128兆位同步DRAM [16Meg x 8, 8Meg x16 128-MBIT SYNCHRONOUS DRAM]
分类和应用: 存储内存集成电路光电二极管动态存储器时钟
文件页数/大小: 62 页 / 530 K
品牌: ISSI [ INTEGRATED SILICON SOLUTION, INC ]
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IS42S81600D, IS42S16800D  
possible CAS latency; data elementn + 3 is either the last of  
a burst of four or the last desired of a longer burst. Following  
thePRECHARGEcommand,asubsequentcommandtothe  
same bank cannot be issued until tRP is met. Note that part  
of the row precharge time is hidden during the access of the  
last data element(s).  
In the case of a fixed-length burst being executed to  
completion, a PRECHARGE command issued at the opti-  
mum time (as described above) provides the same opera-  
tion that would result from the same fixed-length burst with  
auto precharge. The disadvantage of the PRECHARGE  
commandisthatitrequiresthatthecommandandaddress  
buses be available at the appropriate time to issue the  
command;theadvantageofthePRECHARGEcommandis  
that it can be used to truncate fixed-length or full-page  
bursts.  
Full-page READ bursts can be truncated with the BURST  
TERMINATE command, and fixed-length READ bursts  
may be truncated with a BURST TERMINATE command,  
providedthatautoprechargewasnotactivated.TheBURST  
TERMINATE command should be issued x cycles before  
the clock edge at which the last desired data element is  
valid, where x equals the CAS latency minus one. This is  
shown in the READ Burst Termination diagram for each  
possibleCASlatency;dataelementn+3isthelastdesired  
data element of a longer burst.  
Integrated Silicon Solution, Inc. — www.issi.com  
29  
Rev. E  
07/28/08  
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