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IC42S16160C-6TL 参数 Datasheet PDF下载

IC42S16160C-6TL图片预览
型号: IC42S16160C-6TL
PDF下载: 下载PDF文件 查看货源
内容描述: [Synchronous DRAM, 16MX16, 5.4ns, CMOS, PDSO54, 0.400 X 875 INCH, 0.80 MM PITCH, LEAD FREE, TSOP2-54]
分类和应用: 时钟动态存储器光电二极管内存集成电路
文件页数/大小: 40 页 / 1538 K
品牌: ISSI [ INTEGRATED SILICON SOLUTION, INC ]
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IS42S83200C
IS42S16160C,
IC42S16160C
OPERATING AC PARAMETER
(AC operating conditions unless otherwise noted)
Version
Parameter
Symbol
-6
Row active to row active delay
RAS to CAS delay
Row precharge time
t
RRD
(min)
t
RCD
(min)
t
RP
(min)
t
RAS
(min)
Row active time
t
RAS
(max)
Row cycle time
Last data in to row precharge
Last data in to active delay
Last data in to new col. address delay
Last data in to burst stop
Mode register set cycle time
Unit
-75
15
20
20
45
100K
65
2
5
1
1
2
Note
-7
14
20
20
45
100K
63
2
5
1
1
2
12
18
18
42
100K
60
2
5
1
1
2
ns
ns
ns
ns
ns
ns
CLK
CLK
CLK
CLK
CLK
1
1
1
1
t
RC
(min)
t
RDL
(min)
t
DAL
(min)
t
CDL
(min)
t
DBL
(min)
t
MRD
(min)
1
R e fre sh in te rva l tim e
Auto refresh cycle time
t
REF
(max)
t
ARFC
(min)
64
60
64
70
64
75
ms
ns
NOTES:
1. The minimum number of clock cycles is determined by dividing the minimum time required with clock cycle time and then rounding off to the next
higher integer.
8
Integrated Silicon Solution, Inc. — www.issi.com
Rev. 00D
05/29/08