IC41C82002S
IC41LV82002S
2M x 8 (16-MBIT) DYNAMIC RAM
WITH EDO PAGE MODE
FEATURES
DESCRIPTION
• Extended Data-Out (EDO) Page Mode
access cycle
The ICSI 82002S Series is a 2,097,152 x 8-bit high-perfor-
mance CMOS Dynamic Random Access Memory. The EDO
Page Mode allows 2,048 random accesses within a single row
with access cycle time as short as 20 ns per 8-bit word.
• TTL compatible inputs and outputs
• Refresh Interval:
-- 2,048 cycles/32 ms
These features make the 82002S Series ideally suited for high-
bandwidth graphics, digital signal processing, high-performance
computing systems, and peripheral applications.
• Refresh Mode: RAS-Only,
CAS-before-RAS (CBR), and Hidden
• Self Refresh Mode 2,048 cycles/64ms
• JEDEC standard pinout
• Single power supply:
The 82002S Series is packaged in a 28-pin 300mil SOJ and a
28 pin 400mil TSOP-2
5V±10% or 3.3V ± 10%
• Byte Write and Byte Read operation via
CAS
PRODUCT SERIES OVERVIEW
KEY TIMING PARAMETERS
Part No.
IC41C82002S
Refresh
Voltage
5V ± 10%
3.3V ± 10%
Parameter
-50
50
13
25
20
84
-60 Unit
RAS Access Time (tRAC)
CAS Access Time (tCAC)
Column Address Access Time (tAA)
EDO Page Mode Cycle Time (tPC)
Read/Write Cycle Time (tRC)
60
15
30
25
ns
ns
ns
ns
2K
IC41LV82002S
2K
104 ns
PIN CONFIGURATION
28 Pin SOJ, TSOP-2
PIN DESCRIPTIONS
A0-A10 Address Inputs
I/O0-7
WE
Data Inputs/Outputs
Write Enable
OE
Output Enable
Row Address Strobe
Column Address Strobe
Power
RAS
CAS
Vcc
GND
NC
Ground
No Connection
ICSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors
which may appear in this publication. © Copyright 2000, Integrated Circuit Solution Inc.
2
Integrated Circuit Solution Inc.
DR022-0A 08/20/2001
ISSI [ INTEGRATED SILICON SOLUTION, INC ]
