AS7C33256NTD32A
AS7C33256NTD36A
®
Timing waveform of snooze mode
CLK
tPUS
ZZ setup cycle
ZZ recovery cycle
ZZ
tZZI
Isupply
ISB2
tRZZI
All inputs
Deselect or Read Only
(except ZZ)
Deselect or Read Only
Normal
operation
Cycle
High-Z
Dout
AC test conditions
• Output Load: see Figure B,
Thevenin equivalent:
except for t
, t
, t
, t
see Figure C.
LZC LZOE HZOE HZC
• Input pulse level: GND to 3V. See Figure A.
+3.3V for 3.3V I/O;
/+2.5V for 2.5V I/O
• Input rise and fall time (Measured at 0.3V and 2.7V): 2 ns. See Figure A.
• Input and output timing reference levels: 1.5V.
319
Ω
/1667
Ω
Z0=50Ω
50Ω
DOUT
+3.0V
Dout
VL=1.5V
5 pF*
GND
90%
10%
90%
10%
353Ω/1538
Ω
30 pF*
*including scope
and jig capacitance
GND
Figure A: Input waveform
Figure B: Output load (A)
Figure C: Output load(B)
11/30/04, v. 2.1
Alliance Semiconductor
P. 15 of 19
ISSI [ INTEGRATED SILICON SOLUTION, INC ]
