IRS20124S(PbF)
Static Electrical Characteristics
V
(V , V ) = 15V and T = 25°C unless otherwise specified.
BIAS
CC
BS
A
Symbol
VIH
Definition
Min.
2.5
—
—
—
8.3
7.5
8.3
Typ.
—
—
—
—
9.0
8.2
9.0
8.2
—
—
—
3
0
1.0
1.2
Max. Units Test Conditions
Logic high input voltage
—
1.2
1.2
0.1
9.7
8.9
9.7
8.9
1
Vcc=10~20V
VIL
VOH
VOL
UVCC+
UVCC-
UVBS+
UVBS-
IQBS
IQCC
ILK
IIN+
IIN-
Io+
Io-
VDT1
VDT2
VDT3
VDT4
VSOC+
Logic low input voltage
High level output voltage, VBIAS – VO
Low level output voltage, VO
Vcc supply UVLO positive threshold
Vcc supply UVLO negative threshold
High side well UVLO positive threshold
Io=0A
Io=0A
V
High side well UVLO negative threshold 7.5
High side quiescent current
Low side quiescent current
High to Low side leakage current
Logic “1” input bias current
—
—
—
—
—
—
—
mA
µA
A
4
VDT =V
cc
VB=VS =200V
VIN =3.3V
VIN =0V
Vo=0V, PW<10µS
Vo=15V, PW<10µS
50
10
1.0
—
Logic “0” input bias current
Output high short circuit current (Source)
Output low short circuit current (Sink)
DT mode select threshold 1
DT mode select threshold 2
DT mode select threshold 3
DT mode select threshold 4
Positive OC threshold in Vs
—
0.8xVcc 0.89xVcc 0.97xVcc
0.51xVcc 0.57xVcc 0.63xVcc
0.32xVcc 0.36xVcc 0.40xVcc
0.21xVcc 0.23xVcc 0.25xVcc
V
0.75
1.0
1.25
OCSET1=3.22V
OCSET2=1.20
OCSET1=3.22V
OCSET2=1.20V
VSOC-
Negative OC threshold in Vs
-1.25
-1.0
-0.75
4
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