X9400
Instruction Format
Notes:
(1)
(2)
(3)
(4)
“A1 ~ A0”: stands for the device addresses sent by the master.
WPx refers to wiper position data in the Counter Register
“I”: stands for the increment operation, SI held HIGH during active SCK phase (high).
“D”: stands for the decrement operation, SI held LOW during active SCK phase (high).
Read Wiper Counter Register (WCR)
CS
Falling
Edge 0 1 0 1 0 0 A A 1
1 0
device type
identifier
device
addresses
instruction
opcode
0
0
1
WCR
addresses
0
CS
W W W W W W Rising
P P
0
0 0 P P P P P P Edge
1 0
5 4 3 2 1 0
wiper position
(sent by X9400 on SO)
Write Wiper Counter Register (WCR)
CS
Falling
Edge 0 1 0 1 0 0 A A 1
1 0
device type
identifier
device
addresses
instruction
opcode
0
1
0
WCR
addresses
0
CS
W W W W W W Rising
P P
0
0 0 P P P P P P Edge
1 0
5 4 3 2 1 0
Data Byte
(sent by Host on SI)
Read Data Register (DR)
CS
Falling
Edge 0 1 0 1 0 0 A A 1 0 1 1 R R P
1 0
1 0 1
device type
identifier
device
addresses
instruction
opcode
DR and WCR
addresses
CS
Rising
W W W W W W
P
0 0 P P P P P P Edge
0
5 4 3 2 1 0
Data Byte
(sent by X9400 on SO)
Write Data Register (DR)
CS
Falling
Edge 0 1 0 1 0 0 A A 1 1 0 0 R
1 0
1
device type
device
identifier
addresses
instruction
opcode
DR and WCR
addresses
R
0
P
1
P
0
CS
Rising
W W W W W W
0 0 P P P P P P Edge
5 4 3 2 1 0
Data Byte
(sent by host on SI)
HIGH-VOLTAGE
WRITE CYCLE
Transfer Data Register (DR) to Wiper Counter Register (WCR)
device type
device
instruction DR and WCR
CS
CS
identifier
addresses
opcode
addresses
Falling
Rising
A A
R R P P Edge
Edge 0 1 0 1 0 0
1 1 0 1
1 0
1 0 1 0
Transfer Wiper Counter Register (WCR) to Data Register (DR)
device type
device
instruction DR and WCR
CS
CS
identifier
addresses
opcode
addresses
Falling
Rising
Edge 0 1 0 1 0 0 A A 1 1 1 0 R R P P Edge
1 0
1 0 1 0
HIGH-VOLTAGE
WRITE CYCLE
9
FN8189.3
July 28, 2006
INTERSIL [ INTERSIL CORPORATION ]
