欢迎访问ic37.com |
会员登录 免费注册
发布采购

X9258US24I 参数 Datasheet PDF下载

X9258US24I图片预览
型号: X9258US24I
PDF下载: 下载PDF文件 查看货源
内容描述: 低噪音/低功耗/ 2 - Wire总线/ 256水龙头 [Low Noise/Low Power/2-Wire Bus/256 Taps]
分类和应用: 转换器电阻器光电二极管
文件页数/大小: 20 页 / 347 K
品牌: INTERSIL [ Intersil ]
 浏览型号X9258US24I的Datasheet PDF文件第1页浏览型号X9258US24I的Datasheet PDF文件第2页浏览型号X9258US24I的Datasheet PDF文件第3页浏览型号X9258US24I的Datasheet PDF文件第5页浏览型号X9258US24I的Datasheet PDF文件第6页浏览型号X9258US24I的Datasheet PDF文件第7页浏览型号X9258US24I的Datasheet PDF文件第8页浏览型号X9258US24I的Datasheet PDF文件第9页  
X9258  
ACK Polling Sequence  
Four of the nine instructions end with the transmission  
of the instruction byte. The basic sequence is  
illustrated in Figure 3. These two-byte instructions  
exchange data between the Wiper Counter Register  
and one of the data registers. A transfer from a Data  
Register to a Wiper Counter Register is essentially a  
write to a static RAM. The response of the wiper to this  
Nonvolatile Write  
Command Completed  
EnterACK Polling  
Issue  
START  
action will be delayed t  
. A transfer from the Wiper  
WRL  
Counter Register (current wiper position), to a data  
register is a write to nonvolatile memory and takes a  
minimum of t  
to complete. The transfer can occur  
WR  
Issue Slave  
Address  
Issue STOP  
between one of the four potentiometers and one of its  
associated registers; or it may occur globally, wherein  
the transfer occurs between all of the potentiometers  
and one of their associated registers.  
ACK  
Returned?  
No  
Four instructions require a three-byte sequence to  
complete. These instructions transfer data between  
the host and the X9258; either between the host and  
one of the data registers or directly between the host  
and the Wiper Counter Register. These instructions  
are: Read Wiper Counter Register (read the current  
wiper position of the selected pot), Write Wiper  
Counter Register (change current wiper position of the  
selected pot), Read Data Register (read the contents  
of the selected nonvolatile register) and Write Data  
Register (write a new value to the selected data  
register). The sequence of operations is shown in  
Figure 4.  
Yes  
Further  
Operation?  
No  
Yes  
Issue  
Instruction  
Issue STOP  
Proceed  
Proceed  
Instruction Structure  
The next byte sent to the X9258 contains the  
instruction and register pointer information. The four  
most significant bits are the instruction. The next four  
bits point to one of the two pots and when applicable  
they point to one of four associated registers. The  
format is shown below in Figure 2.  
Figure 2. Instruction Byte Format  
Register  
Select  
I3  
I2  
I1  
I0  
R1 R0  
P1 P0  
Wiper Counter  
Register Select  
Instructions  
The four high order bits define the instruction. The next  
two bits (R1 and R0) select one of the four registers  
that is to be acted upon when a register oriented  
instruction is issued. The last bits (P1, P0) select  
which one of the four potentiometers is to be affected  
by the instruction.  
FN8168.1  
4
May 6, 2005