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ICL7109CPL 参数 Datasheet PDF下载

ICL7109CPL图片预览
型号: ICL7109CPL
PDF下载: 下载PDF文件 查看货源
内容描述: 12位微处理器兼容A / D转换器 [12-Bit, Microprocessor- Compatible A/D Converter]
分类和应用: 转换器微处理器
文件页数/大小: 25 页 / 947 K
品牌: INTERSIL [ INTERSIL CORPORATION ]
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ICL7109
Pin Descriptions
PIN
24
(Continued)
DESCRIPTION
Oscillator Select - Input high configures OSC IN, OSC OUT, BUF OSC OUT as RC oscillator - clock
will be same phase and duty cycle as BUF OSC OUT.
Input low configures OSC IN, OSC OUT for crystal oscillator - clock frequency will be 1/58 of
frequency at BUF OSC OUT.
Buffered Oscillator Output
Input High - Conversions continuously performed every 8192 clock pulses.
Input Low - Conversion in progress completed, converter will stop in Auto-Zero 7 counts before
integrate.
Input - Used in handshake mode to indicate ability of an external device to accept data. Connect to
+5V if not used.
Analog Negative Supply - Nominally -5V with respect to GND (Pin 1).
Reference Voltage Output - Nominally 2.8V down from V+ (Pin 40).
Buffer Amplifier Output.
Auto-Zero Node - Inside foil of C
AZ
.
Integrator Output - Outside foil of C
INT
.
Analog Common - System is Auto-Zeroed to COMMON.
Differential Input Low Side.
Differential Input High Side.
Differential Reference Input Positive.
Reference Capacitor Positive.
Reference Capacitor Negative.
Differential Reference Input Negative.
Positive Supply Voltage - Nominally +5V with respect to GND (Pin 1).
SYMBOL
OSC SEL
25
26
BUF OSC OUT
RUN/HOLD
27
SEND
28
29
30
31
32
33
34
35
36
37
38
39
40
V-
REF OUT
BUFFER
AUTO-ZERO
INTEGRATOR
COMMON
INPUT LO
INPUT HI
REF IN +
REF CAP +
REF CAP-
REF IN-
V+
NOTE: All digital levels are positive true.
5