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ICL7109CPL 参数 Datasheet PDF下载

ICL7109CPL图片预览
型号: ICL7109CPL
PDF下载: 下载PDF文件 查看货源
内容描述: 12位微处理器兼容A / D转换器 [12-Bit, Microprocessor- Compatible A/D Converter]
分类和应用: 转换器微处理器
文件页数/大小: 25 页 / 947 K
品牌: INTERSIL [ Intersil ]
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ICL7109  
o
Analog Electrical Specifications V+ = +5V, V- = -5V, GND = 0V, T = 25 C, f  
= 3.58MHz,  
A
CLK  
Unless Otherwise Specified (Continued)  
PARAMETER  
TEST CONDITIONS  
= 408.9mV = > 7770 Reading Ext. Ref. 0ppm/ C  
MIN  
TYP  
MAX  
UNIT  
o
o
Scale Factor Temperature Coefficient  
V
-
1
5
ppm/ C  
IN  
8
(Note 4)  
REFERENCE VOLTAGE  
Ref Out Voltage, V  
Referred to V+, 25kBetween V+ and REF OUT  
25kBetween V+ and REF OUT (Note 4)  
-2.4  
-
-2.8  
80  
-3.2  
-
V
REF  
o
Ref Out Temperature Coefficient  
POWER SUPPLY CHARACTERISTICS  
Supply Current V+ to GND, I+  
ppm/ C  
V
= 0V, Crystal Osc 3.58MHz Test Circuit  
-
-
700  
700  
1500  
1500  
µA  
µA  
IN  
Supply Current V+ to V-, I  
Pins 2 - 21, 25, 26, 27, 29; Open  
SUPP  
o
Digital Electrical Specifications V+ = +5V, V- = -5V, GND = 0V, T = 25 C, Unless Otherwise Specified  
A
PARAMETER  
DIGITAL OUTPUTS  
Output High Voltage, V  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
I
I
= 100µA Pins 2 - 16, 18, 19, 20  
3.5  
4.3  
±0.20  
±0.01  
5
-
±0.40  
±1  
V
V
OH  
OL  
OUT  
OUT  
Output Low Voltage, V  
= 1.6mA Pins 2 - 16, 18, 19, 20  
-
-
-
Output Leakage Current  
Control I/O Pullup Current  
Pins 3 - 16 High Impedance  
µA  
µA  
Pins 18, 19, 20 V  
(Note 4)  
= V+ -3V MODE Input at GND  
-
OUT  
Control I/O Loading  
HBEN Pin 19 LBEN Pin 18 (Note 4)  
-
50  
pF  
DIGITAL INPUTS  
Input High Voltage, V  
IH  
Pins 18 - 21, 26, 27 Referred to GND  
Pins 18 - 21, 26, 27 Referred to GND  
3.0  
-
-
-
1
-
V
Input Low Voltage, V  
-
-
-
-
V
IL  
Input Pull-Up Current  
Input Pull-Up Current  
Pins 26, 27 V  
Pins 17, 24 V  
= (V+) -3V  
= (V+) -3V  
5
µA  
µA  
µA  
OUT  
OUT  
25  
5
-
Input Pull-Down Current  
Pin 21 V  
= GND +3V  
-
OUT  
TIMING CHARACTERISTICS  
MODE Input Pulse Width, t  
(Note 4)  
50  
-
-
ns  
W
NOTES:  
1. Input voltages may exceed the supply voltages provided the input current is limited to ±100µA.  
2. Due to the SCR structure inherent in the process used to fabricate these devices, connecting any digital inputs or outputs to voltages  
greater than V+ or less than GND may cause destructive device latchup. For this reason it is recommended that no inputs from sources  
other than the same power supply be applied to the ICL7109 before its power supply is established, and that in multiple supply systems  
the supply to the ICL7109 be activated first.  
3. This limit refers to that of the package and will not be obtained during normal operation.  
4. This parameter is not production tested, but is guaranteed by design.  
o
o
5. Roll-over error for T = -55 C to 125 C is ±10 counts (Max).  
A
6. A full scale voltage of 2.048V is used because a full scale voltage of 4.096V exceeds the devices Common Mode Voltage Range.  
7. For CERDIP package the Ratiometric error can be -4 (Min).  
3