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DG411DYZ 参数 Datasheet PDF下载

DG411DYZ图片预览
型号: DG411DYZ
PDF下载: 下载PDF文件 查看货源
内容描述: 单片四路SPST , CMOS模拟开关 [Monolithic Quad SPST, CMOS Analog Switches]
分类和应用: 开关
文件页数/大小: 13 页 / 354 K
品牌: INTERSIL [ INTERSIL CORPORATION ]
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DG411, DG412, DG413
Ordering Information
PART NUMBER
DG411DJ
DG411DJZ (Note)
DG411DY*
DG411DYZ* (Note)
DG411DVZ* (Note)
DG412DJ
DG412DJZ (Note)
DG412DY*
DG412DYZ* (Note)
DG412DVZ* (Note)
DG413DJ
DG413DJZ (Note)
DG413DY*
DG413DYZ* (Note)
DG413DVZ* (Note)
PART MARKING
DG411DJ
DG411DJZ
DG411DY
DG411DYZ
DG411 DVZ
DG412DJ
DG412DJZ
DG412DY
DG412DYZ
DG412 DVZ
DG413DJ
DG413DJZ
DG413DY
DG413DYZ
DG413 DVZ
TEMP. RANGE (°C)
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +85
PACKAGE
16 Ld PDIP
16 Ld PDIP** (Pb-free)
16 Ld SOIC (150 mil)
16 Ld SOIC (150 mil) (Pb-free)
PKG. DWG. #
E16.3
E16.3
M16.15
M16.15
16 Ld TSSOP (4.4mm) (Pb-free) M16.173
16 Ld PDIP
16 Ld PDIP** (Pb-free)
16 Ld SOIC (150 mil)
16 Ld SOIC (150 mil) (Pb-free)
E16.3
E16.3
M16.15
M16.15
16 Ld TSSOP (4.4mm) (Pb-free) M16.173
16 Ld PDIP
16 Ld PDIP** (Pb-free)
16 Ld SOIC (150 mil)
16 Ld SOIC (150 mil) (Pb-free)
E16.3
E16.3
M16.15
M16.15
16 Ld TSSOP (4.4mm) (Pb-free) M16.173
*Add “-T” suffix for tape and reel.
**Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing
applications.
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin
plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products
are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
TRUTH TABLE
DG411
LOGIC
0
1
DG412
SWITCH
1, 4
Off
On
DG413
SWITCH
2, 3
On
Off
Pin Descriptions
PIN
1
2
3
4
5
6
7
8
9
SYMBOL
IN
1
D
1
S
1
V-
GND
S
4
D
4
IN
4
IN
3
D
3
S
3
V
L
V+
S
2
D
2
IN
2
DESCRIPTION
Logic Control for Switch 1.
Drain (Output) Terminal for Switch 1.
Source (Input) Terminal for Switch 1.
Negative Power Supply Terminal.
Ground Terminal (Logic Common).
Source (Input) Terminal for Switch 4.
Drain (Output) Terminal for Switch 4.
Logic Control for Switch 4.
Logic Control for Switch 3.
Drain (Output) Terminal for Switch 3.
Source (Input) Terminal for Switch 3.
Logic Reference Voltage.
Positive Power Supply Terminal (Substrate).
Source (Input) Terminal for Switch 2.
Drain (Output) Terminal for Switch 2.
Logic Control for Switch 2.
SWITCH SWITCH
On
Off
Off
On
NOTE: Logic “0”
≤0.8V.
Logic “1”
≥2.4V.
Pinout
DG411, DG412, DG413
(16 LD PDIP, SOIC, TSSOP)
TOP VIEW
IN
1
1
D
1
2
S
1
3
V- 4
GND 5
S
4
6
D
4
7
IN
4
8
16
IN
2
15
D
2
14
S
2
13
V+
12
V
L
11
S
3
10
D
3
9 IN
3
10
11
12
13
14
15
16
2
FN3282.13
June 20, 2007