DG408, DG409
Pinouts
DG408 (PDIP, SOIC, TSSOP)
TOP VIEW
A
0
1
EN 2
V- 3
S
1
4
S
2
5
S
3
6
S
4
7
D 8
16 A
1
15 A
2
14 GND
13 V+
12 S
5
11 S
6
10 S
7
9 S
8
DG409 (PDIP, SOIC, TSSOP)
TOP VIEW
A
0
1
EN 2
V- 3
S
1A
4
S
2A
5
S
3A
6
S
4A
7
D
A
8
16 A
1
15 GND
14 V+
13 S
1B
12 S
2B
11 S
3B
10 S
4B
9 D
B
Functional Block Diagrams
DG408
DG409
S
1
D
S
1A
D
A
S
2
DECODER/
DRIVER
S
4A
S
1B
DECODER/
DRIVER
D
B
S
8
S
4B
5V
REF
LEVEL
SHIFT
5V
REF
LEVEL
SHIFT
†
DIGITAL
INPUT
PROTECTION
†
†
†
†
†
DIGITAL
INPUT
PROTECTION
†
†
†
A
0
A
1
A
2
EN
A
0
A
1
EN
TRUTH TABLE DG408
A
2
X
0
0
0
0
1
1
1
1
A
1
X
0
0
1
1
0
0
1
1
A
0
X
0
1
0
1
0
1
0
1
EN
0
1
1
1
1
1
1
1
1
ON SWITCH
NONE
1
2
3
4
5
6
7
8
A
1
X
0
0
1
1
NOTES:
A
0
X
0
1
0
1
TRUTH TABLE DG409
EN
0
1
1
1
1
ON SWITCH
NONE
1
2
3
4
1. V
AH
Logic “1”
≥2.4V.
2. V
AL
Logic “0”
≤0.8V.
2
FN3283.8
June 13, 2006