CA3127
Test Circuits
V+
10kΩ
470
pF
BIAS-CURRENT
ADJ
0.01
µF
RL
1µF
2
VO
51Ω
6
4
Q2
0.01µF
3
8
Q3
470pF
1µF
470pF
0.01
µF
7
GEN
VI
FIGURE 1. VOLTAGE-GAIN TEST CIRCUIT USING CURRENT-MIRROR BIASING FOR Q
2
1.5 - 8pF
VO
C2
(NOTE 5)
8.2
kΩ
12
0.47µH
SHIELD
Q5
13
14
1000
pF
620Ω 1000
2
pF
TEST
POINT
VI
1000pF 0.3µH
4
Q2
560Ω
1.8pF
750Ω
C1
3
6
NOTES:
1%
(NOTE 5)
4. This circuit was chosen because it conveniently repre-
sents a close approximation in performance to a proper-
ly unilateralized single transistor of this type. The use of
1000
pF
OHMITE
Z144
+12V
25kΩ
Q in a current-mirror configuration facilitates simplified
8
Q3
3
biasing. The use of the cascode circuit in no way implies
that the transistors cannot be used individually.
1000
pF
7
5
5. E.F. Johnson number 160-104-1 or equivalent.
FIGURE 2. 100MHz POWER-GAIN AND NOISE-FIGURE TEST CIRCUIT
GENERAL RADIO 1021-P1
100MHz GENERATOR
100MHz
TEST SET
BOONTON 91C
RF VOLTMETER
ATTN
12VDC
POWER SUPPLY
FIGURE 3A. POWER GAIN SET-UP
VHF NOISE SOURCE
HEWLETT PACKARD HP343A
100MHz
TEST SET
100MHz
POST AMPLIFIER
NOISE FIGURE METER
HEWLETT PACKARD HP342A
12VDC
15VDC
POWER SUPPLY
POWER SUPPLY
FIGURE 3B. NOISE FIGURE SET-UP
FIGURE 3. BLOCK DIAGRAMS OF POWER-GAIN AND NOISE-FIGURE TEST SET-UPS
5-3
INTERSIL [ Intersil ]
