ISL23428
Typical Performance Curves (Continued)
1V/DIV
0.2µs/DIV
0.5V/DIV
20µs/DIV
V
CC
CS RISING
WIPER
WIPER
FIGURE 21. WIPER LARGE SIGNAL SETTLING TIME
FIGURE 22. POWER-ON START-UP IN VOLTAGE DIVIDER MODE
CH1: RH TERMINAL
CH2: RW TERMINAL
1.8
1.6
1.4
1.2
1.0
V
= 5.5V, V
= 5.5V
LOGIC
CC
0.8
0.6
0.4
0.2
0
V
= 1.7V, V
LOGIC
= 1.2V
110
CC
0.5V/DIV, 0.2µs/DIV
-3dB FREQUENCY = 1.4MHz AT MIDDLE TAP
-40
-15
10
35
60
85
TEMPERATURE (°C)
FIGURE 23. 10kΩ -3dB CUT OFF FREQUENCY
FIGURE 24. STANDBY CURRENT vs TEMPERATURE
Functional Pin Descriptions
Potentiometers Pins
Power Pins
RHI AND RLI
V
CC
The high (RHi, i = 0, 1) and low (RLi, i = 0, 1) terminals of the
ISL23428 are equivalent to the fixed terminals of a mechanical
potentiometer. RHi and RLi are referenced to the relative position
of the wiper and not the voltage potential on the terminals. With
WRi set to 127 decimal, the wiper will be closest to RHi, and with
the WRi set to 0, the wiper is closest to RLi.
Power terminal for the potentiometer section analog power
source. Can be any value needed to support voltage range of DCP
pins, from 1.7V to 5.5V, independent of the V
voltage.
LOGIC
Bus Interface Pins
SERIAL CLOCK (SCK)
RWI
This input is the serial clock of the SPI serial interface.
RWi (i = 0, 1) is the wiper terminal, and it is equivalent to the
movable terminal of a mechanical potentiometer. The position of
the wiper within the array is determined by the WRi register.
SERIAL DATA INPUT (SDI)
The SDI is a serial data input pin for SPI interface. It receives
operation code, wiper address and data from the SPI remote
host device. The data bits are shifted in at the rising edge of the
serial clock SCK, while the CS input is low.
FN7904.0
August 25, 2011
13
INTERSIL [ Intersil ]
