256-Mbit J3 (x8/x16)
9.2
Device Commands
When the VPEN voltage ≤ VPENLK, only read operations from the Status Register, CFI, identifier
codes, or blocks are enabled. Placing VPENH on VPEN additionally enables block erase, program,
and lock-bit configuration operations. Device operations are selected by writing specific
commands into the CUI. Table 14, “Command Bus-Cycle Definitions” on page 35 defines these
commands.
Table 14. Command Bus-Cycle Definitions (Sheet 1 of 2)
Scalable or
Basic
First Bus Cycle
Second Bus Cycle
Bus
Cycles
Req’d.
Command
Notes
Command
Oper(3)
Addr(4)
Data(5,6)
Oper(3)
Addr(4)
Data(5,6)
Set(2)
Read Array
SCS/BCS
SCS/BCS
SCS
1
≥ 2
≥ 2
2
Write
Write
Write
Write
Write
X
X
X
X
X
0xFF
0X90
0x98
0x70
0x50
1
1,7
1
Read Identifier Codes
Read Query
Read
Read
Read
IA
QA
X
ID
QD
Read Status Register
Clear Status Register
SCS/BCS
SCS/BCS
SRD
1,8
1
1
1,9, 10,
11
Write to Buffer
SCS/BCS
> 2
Write
BA
0xE8
Write
BA
N
0x40 or
0x10
Word/Byte Program
Block Erase
SCS/BCS
SCS/BCS
SCS/BCS
2
2
1
Write
Write
Write
X
BA
X
Write
Write
PA
BA
PD
1,12,13
1,11,12
1,12,14
0x20
0xB0
0xD0
Block Erase, Program
Suspend
Block Erase, Program
Resume
SCS/BCS
1
Write
X
0xD0
1,12
Configuration
SCS
SCS
2
2
Write
Write
X
X
0xB8
0x60
Write
Write
X
CC
1
1
Set Block Lock-Bit
BA
0x01
Datasheet
35
INTEL [ INTEL ]
