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SPD6722QCCE 参数 Datasheet PDF下载

SPD6722QCCE图片预览
型号: SPD6722QCCE
PDF下载: 下载PDF文件 查看货源
内容描述: ISA到PC卡( PCMCIA )控制器 [ISA-to-PC-Card (PCMCIA) Controllers]
分类和应用: 总线控制器微控制器和处理器PC
文件页数/大小: 138 页 / 837 K
品牌: INTEL [ INTEL ]
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PD6710/22 ISA-to-PC-Card (PCMCIA) Controllers  
8.6  
Card I/O Map 01 Offset Address Low  
Register Name: Card I/O Map 01 Offset Address Low  
Index: 36h, 38h  
Register Per: socket  
Register Compatibility Type: ext.  
Bit 7  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
Bit 0  
Offset Address 7:1  
RW:0000000  
01  
RW:0  
1. This bit must be programmed to 0.  
There are two separate Card I/O Map Offset Address Low registers, each with identical fields.  
These registers are located at the following indexes:  
Index Card I/O Map Offset Address Low  
36h  
38h  
Card I/O Map 0 Offset Address Low  
Card I/O Map 1 Offset Address Low  
Bits 7:1 Offset Address 7:1  
This register contains the least-significant byte of the quantity that will be added to the host I/O  
address; this will determine the PC Card I/O map location where the I/O access will occur.  
The most-significant byte is located in the Card I/O Map 01 Offset Address High register (see  
Card I/O Map 01 Offset Address Highon page 62).  
8.7  
Card I/O Map 01 Offset Address High  
Register Name: Card I/O Map 01 Offset Address High  
Index: 37h, 39h  
Register Per: socket  
Register Compatibility Type: ext.  
Bit 7  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
Bit 0  
Offset Address 15:8  
RW:00000000  
There are two separate Card I/O Map Offset Address High registers, each with identical fields.  
These registers are located at the following indexes:  
Index Card I/O Map Offset Address High  
37h  
39h  
Card I/O Map 0 Offset Address High  
Card I/O Map 1 Offset Address High  
62  
Datasheet  
 
 
 
 
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