ISA-to-PC-Card (PCMCIA) Controllers — PD6710/’22
Table 11. Index Registers (Sheet 2 of 3)
Index Value
Page
Register Name
Chapter
Number
Socket A
Socket B1
System Memory Map 0 Start Address Low
System Memory Map 0 Start Address High
System Memory Map 0 End Address Low
System Memory Map 0 End Address High
Card Memory Map 0 Offset Address Low
Card Memory Map 0 Offset Address High
Misc Control 1
10h
11h
12h
13h
14h
15h
16h
50h
51h
52h
53h
54h
55h
56h
64
65
66
66
67
68
70
“Memory Window
Mapping Registers”
on page 64
“Extension
Registers” on
page 70
FIFO Control
17h
57h
72
System Memory Map 1 Start Address Low
System Memory Map 1 Start Address High
System Memory Map 1 End Address Low
System Memory Map 1 End Address High
Card Memory Map 1 Offset Address Low
Card Memory Map 1 Offset Address High
Misc Control 2
18h
19h
1Ah
1Bh
1Ch
1Dh
58h
59h
5Ah
5Bh
5Ch
5Dh
64
65
66
61
67
68
72
“Memory Window
Mapping Registers”
on page 64
“Memory Window
Mapping Registers”
on page 64
1Eh2
1Fh2
“Extension
Registers” on
page 70
Chip Information
74
System Memory Map 2 Start Address Low
System Memory Map 2 Start Address High
System Memory Map 2 End Address Low
System Memory Map 2 End Address High
Card Memory Map 2 Offset Address Low
Card Memory Map 2 Offset Address High
20h
21h
22h
23h
24h
25h
60h
61h
62h
63h
64h
65h
64
65
66
66
67
68
“Memory Window
Mapping Registers”
on page 64
“Extension
Registers” on
page 70
ATA Control
26h
66h
75
Scratchpad
27h
28h
29h
2Ah
2Bh
2Ch
2Dh
67h
68h
69h
6Ah
6Bh
6Ch
6Dh
–
–
System Memory Map 3 Start Address Low
System Memory Map 3 Start Address High
System Memory Map 3 End Address Low
System Memory Map 3 End Address High
Card Memory Map 3 Offset Address Low
Card Memory Map 3 Offset Address High
1. Socket B is available on the dual-socket PD6722.
64
65
60
66
67
68
“Memory Window
Mapping Registers”
on page 64
2. This register affects both sockets (it is not specific to either socket).
3. These registers are not available on the PD6710.
Datasheet
43
INTEL [ INTEL ]
