BYTE-WIDE SmartVoltage FlashFile™ MEMORY FAMILY
E
REVISION HISTORY
Number
-001
Description
Original version
-002
Table 3 revised to reflect change in abbreviations from “W” for write to “P” for program.
Ordering information graphic (Appendix A) corrected: from PB = Ext. Temp. 44-Lead
PSOP to TB = Ext. Temp. 44-Lead PSOP.
Corrected nomenclature table (Appendix A) to reflect actual Operating Temperature/
Package information
Updated Ordering Information and table
Correction to table, Section 6.2.3. Under ILO Test Conditions, previously read VIN = VCC
or GND, corrected to VOUT = VCC or GND
Section 6.2.7, modified Program and Block Erase Suspend Latency Times
-003
Added µBGA* CSP pinout and corrected error in PSOP pinout.
Added Design Consideration for VPP Program and Erase Voltages on future sub-0.4µ
devices.
4
PRELIMINARY
INTEL [ INTEL ]
