28F640L30, 28F128L30, 28F256L30
Figure 29. Write State Machine — Next State Table (Sheet 3 of 6)
Command Input to Chip and resulting Output Mux Next State
Buffered BE Conf ir m,
Lock,
Unlock,
ID/Query Lock-dow n,
CR setup (5)
Word
Enhanced
Factory
P/ E
Resume,
ULB
Pr ogr am/
Er as e
Suspend
Clear
Status
Register (6)
Read
Array
Erase
Setup (4,5)
Read
Status
Read
Program BPSetup
Setup (4,5)
(3)
Pgm Setup
Current chip state
(4)
Confirm(9)
(FFH)
(10H/40H)
(E8H)
(20H)
(30H)
(D0H)
(B0H)
(70H)
(50H)
(90H, 98H)
(60H)
BEFP Setup,
BEFP Pgm &
Verify Busy,
Erase Setup,
OTP Setup,
BP: Setup, Load 1,
Load 2, Confirm,
Word Pgm Setup,
Word Pgm Setup in
Erase Susp,
Status Read
BP Setup, Load1,
Load 2, Confirm in
Erase Suspend
Lock/CR Setup,
Lock/CR Setup in
Erase Susp
Status Read
Status
Read
OTP Busy
Ready,
Erase Suspend,
BP Suspend
BP Busy,
Word Program
Busy,
Erase Busy,
BP Busy
Output mux
Status Read does not
change.
Read
Array
Output mux does not
change.
Status Read
Status Read
ID Read
BP Busy in Erase
Suspend
Word Pgm
Suspend,
Word Pgm Busy in
Erase Suspend,
Pgm Suspend In
Erase Suspend
Datasheet
69
INTEL [ INTEL ]
